"In another embodiment according to the present invention, the apertures that expose the interposer contact pads are first filled with a conductive material up to a level that is substantially even with the bottom of the chip cavity. In this manner, the contact pads are built up to further seal the interposer from the chip cavity. Bond wires may then be attached to the built-up pads at a level that is substantially even with the bottom of the chip cavity, rather than in the relatively small space provided by the apertures in the housing structure exposing the contact pads. A liquid sealant may also be applied to further seal the connection between the built-up pads and the bond wires.
"In an alternative to the above embodiment, the bond pads of the image sensor chip are attached directly to the built-up pads in a flip-chip manner, such that bond wires are not required. A liquid sealant may be applied under the image sensor chip in a capillary process to further seal the connection between the image sensor bond pads and the built-up pads.
"In another embodiment according to the present invention, the housing structure is provided with runners that enable sealing the bottom of the chip cavity simultaneously with sealing the transparent cover to the housing structure. Under this embodiment, a ledge surrounding the chip cavity for supporting edges of the transparent cover acts as a runner for a sealant that fills the space between the edges of the transparent cover and the molded housing structure. At least one additional runner is formed by a channel that extends from the ledge down to the bottom surface of the chip cavity. After the transparent cover is placed on the ledge of the housing structure, a liquid sealant is injected into a sealing well formed in the housing structure adjacent to the runner areas. Capillary flow of the liquid sealant along the ledge fills the space between the edges of the transparent cover and the housing structure. At the same time, capillary flow of the liquid sealant along the additional runner or runners covers the bottom surface of the chip cavity to seal any exposed areas of the interposer.
"Other and further features and advantages will be apparent from the following descriptions of the various embodiments of the present invention when read in conjunction with the accompanying drawings. It should be understood that the following descriptions are provided for illustrative and exemplary purposes only, and that numerous combinations of the elements of the various embodiments of the present invention are possible."
URL and more information on this patent, see: Bolken, Todd O.; Baerlocher, Cary J.; Heppler, Steven W.; Cobbley, Chad A.. Electronic Devices. U.S. Patent Number 8508034, filed
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