The patent's assignee is
News editors obtained the following quote from the background information supplied by the inventors: "The present invention relates to a data processing device and a data processing method.
"In recent years, a multifunction peripheral (MFP) has advanced in high speed performance. In an MFP, a scanning speed in a scanner and a writing speed in a plotter have been improved, which causes a difficulty in securing line isochronism (real time performance in data transfer on a line-by-line basis of image data) in data transference with a main memory.
"Moreover, a chip has shrunk in an MFP. Since an IO function, a central processing unit (CPU), a display output function, and a graphic function are added in addition to functions for an MFP in one chip, not only the line isochronism but also real time performance in system performance (real time performance as a system for interrupt handling and the like in CPU, for example) and real time performance in display performance (real time performance in frame transfer) are required at the same time.
"Furthermore, an aggregation of a main memory has advanced for the purpose of cost reduction. One chip to which a high-speed dynamic random access memory (DRAM) is connected and which is shared in a system causes a concentration of all data transfers to a main memory. In an MFP, it is therefore necessary to use an arbiter for a data transfer between each master and a main memory, control a quality of service (QOS), and ensure line isochronism, real time performance in system performance, and real time performance in display performance.
"In a conventional MFP, a priority level of an access to a main memory by a master in regard to the line isochronism which should be most prioritized is raised to ensure the line isochronism. In the MFP, an idle period in which a master whose line isochronism should be secured within one line is not able to access the main memory is set and a data transfer (page isochronism and system transfer) which should be next prioritized is permitted within the idle time by an arbiter at such a level as not to affect the line isochronism to ensure the real time performance in system performance and the real time performance in display performance.
"However, the conventional MFP has nothing more than a configuration in which the line isochronism is most prioritized and other transfers are made to intervene between whiles. There is a possibility that the real time performance in the system performance, the page transfer, and the frame transfer cannot be ensured depending on a frequency of a request for accessing a memory in regard to the line isochronism.
"For example, a control IC of the MFP transfers a print image as the highest priority to a plotter engine that operates in synchronization with a line synchronization signal in a normal print operation. Since a wait time called 'blanking period' until a start of a next line transfer is present in a line synchronization signal, the control IC is able to perform a transfer processing whose priority level is low during the wait time. Even in the middle of the print operation, it is thus possible to realize a rendering processing of a print image on another page, a processing of the CPU, an operation unit display processing by a graphics processing unit (GPU), and the like.
"In contrast, in a special operation such as a 180-degree rotating print operation, a processing of spreading an expanded image on a main memory for rotating the expanded image by 180 degrees is performed before outputting the image to the plotter engine. Since a decoder reads out codes from the main memory without cease and writes an image after expansion in the main memory in this operation, there is a possibility of occupying a memory bandwidth. Therefore, there arises a problem in this operation that a performance in a data transfer whose priority level is low to the main memory significantly degrades and a performance in an entire system degrades even though functions of the 180-degree rotating print operation can be provided.
"Though there are some methods for solving the problem, it is difficult in any of the methods to realize a compatibility with the transfer to the plotter engine. For example, a way of making a memory priority level of a decoder equivalent to the priority levels of the other modules such as a CPU can be considered. In this case, since the CPU and the other modules are able to access the main memory even in the middle of the 180-degree rotating print operation, it is possible to avoid the degradation in the performance of the entirety of the system. However, there is a case where an expansion processing performance is not ready in time for an output performance of the plotter engine and an abnormal image, for example, is thereby caused, depending on the operational condition of the CPU and the other modules.
"In addition, another way of raising the priority levels of some modules (CPU and GPU, for example) higher than the priority level of the image data transfer can be considered. In this case, since the CPU processing is not interrupted and an operation unit rendering processing of the GPU is not interrupted, either even in the middle of the 180-degree rotating print operation, it is possible to avoid the degradation in the system from a perspective of a user. However, an expansion processing performance is not ready in time for an output performance of the plotter engine depending on the operational contents of the CPU and the GPU. Though this way is effective when the limit performance of the CPU and the GPU is sufficiently low, it becomes impossible to apply this way since it is expected that the limit performance of the CPU and the GPU to be mounted on a future MFP reaches higher.
"Therefore, there is a need for a data processing device and a data processing method that enable, while ensuring an access to a memory by a master of high priority, other masters to effectively access to the memory."
As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventor's summary information for this patent application: "It is an object of the present invention to at least partially solve the problem in the conventional technology.
"According to an embodiment, there is provided a data processing device that includes a first sub-arbiter configured to arbitrate an access by first and second masters that access data stored in a memory; a second sub-arbiter configured to arbitrate an access to the memory by a plurality of masters other than the first and the second masters; a main arbiter configured to prioritize the access to the memory by the first sub-arbiter over the access to the memory by the second sub-arbiter; and a limiting unit configured to limit an amount of the access to the memory by the second master within a preset range.
"According to another embodiment, there is provided a data processing method in a data processing device that includes a first sub-arbiter configured to arbitrate an access by first and second masters that access data stored in a memory, and a second sub-arbiter configured to arbitrate an access to the memory by a plurality of masters other than the first and the second masters. The data processing method includes prioritizing the access to the memory by the first sub-arbiter over the access to the memory by the second sub-arbiter; and limiting an amount of the access to the memory by the second master within a preset range.
"The above and other objects, features, advantages and technical and industrial significance of this invention will be better understood by reading the following detailed description of presently preferred embodiments of the invention, when considered in connection with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
"FIG. 1 illustrates a configuration of an image processing system 10 according to an embodiment;
"FIG. 2 illustrates a flow of data in the image processing system 10 in a normal print operation;
"FIG. 3 illustrates a flow of data in the image processing system 10 in a 180-degree rotating print operation;
"FIG. 4 illustrates a partial configuration of the image processing system 10 when a limiting unit 81 is provided at a port for bus connection of a first arbiter 71;
"FIG. 5 illustrates a partial configuration of the image processing system 10 when the limiting unit 81 is provided at a port for bus connection of a writing DMA for decoder 55;
"FIG. 6 illustrates a configuration of a limiting unit 81 according to a first example;
"FIG. 7 is a flowchart of a processing of the limiting unit 81 according to the first example;
"FIG. 8 illustrates a configuration of a limiting unit 81 according to a second example; and
"FIG. 9 is a flowchart of a processing of the limiting unit 81 according to the second example."
For additional information on this patent application, see: GYOBU, Yoshikazu. Data Processing Device and Data Processing Method. Filed
Keywords for this news article include: Information Technology,
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OCTOBER 31, 2014
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