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Patent Issued for Transmission Line, Impedance Transformer, Integrated Circuit Mounted Device, and Communication Device Module

September 10, 2014



By a News Reporter-Staff News Editor at Journal of Engineering -- From Alexandria, Virginia, VerticalNews journalists report that a patent by the inventor Masuda, Satoshi (Kawasaki, JP), filed on February 1, 2011, was published online on August 26, 2014.

The patent's assignee for patent number 8816793 is Fujitsu Limited (Kawasaki, JP).

News editors obtained the following quote from the background information supplied by the inventors: "Recently, a high-output integrated circuit device that mounts an integrated circuit chip including a high-output transistor is demanded for a mobile telephone base station or radar. In such an integrated circuit mounted device, high-output characteristics are realized by arranging in parallel a plurality of power transistors formed on an integrated circuit chip on a metal package and forming an impedance transformer by a line on a dielectric substrate for impedance matching.

"In order to form a wideband matching circuit, an impedance transformer is utilized, in which a plurality of 1/4 wavelength lines is connected in series so as to keep a Q value small. Such an impedance transformer is used widely in an integrated circuit mounted device that requires wideband characteristics because the wideband characteristics may be obtained by increasing the number of stages of the 1/4 wavelength line. When configuring a 1/4 wavelength impedance transformer, a transmission line having a desired characteristic impedance is formed with the substrate thickness of the wire, the dielectric constant of the substrate, and the wire width being taken into consideration.

"FIGS. 1A and 1B are diagrams explaining impedance conversion, wherein FIG. 1A illustrates a case of matching with one stage and FIG. 1B illustrates a case of matching with two stages. It is assumed that the output impedance of a transistor is R1, the input impedance in the subsequent stage is R0, and R0>R1 holds. When performing matching with one stage as illustrated in FIG. 1A, one 1/4 wavelength line having a characteristic impedance Z is used and it is set as Z=(R0.times.R1).sup.1/2. In contrast to this, when performing matching with two stages as illustrated in FIG. 1B, a 1/4 wavelength line having a characteristic impedance Z1 and a 1/4 wavelength line having a characteristic impedance Z2 are connected in series and they are set as Z1=(R1.sup.3.times.R0).sup.1/4 and Z2=(R1.times.R0.sup.3).sup.1/4. There is a case where 1/4 wavelength lines in three or more stages are connected in series.

"In a high-output integrated circuit mounted device, the gate width of a transistor is increased in order to increase the output. The increase in the gate width of a transistor may be realized by using a plurality of transistors having the same characteristics in parallel and connecting the outputs of the plurality of transistors commonly. If the gate width of the transistor is increased in this manner, the output impedance of the transistor is reduced to 1.OMEGA. or less. In order to increase the output of the transistor at the maximum, the output impedance of several ohms is converted into 50.OMEGA. used normally and to perform impedance matching. In this case, in order to secure the frequency band, as illustrated in FIG. 1B, a plurality of impedance transformers are connected in series and the impedance is converted into 50.OMEGA. stepwise for matching. The shape of the 1/4 wavelength line, such as its length and width, is determined based on the dielectric constant, the impedance, etc., of the substrate. Because of this, a high-impedance line that uses a substrate with a low dielectric constant has a longer length and a greater width compared to a low-impedance line that uses a substrate with a high dielectric constant. As a result, there is such a problem that the size of the matching circuit is increased. Because of this, a pattern layout in which a long line is bent in wiring is used to downsize the matching circuit.

"FIG. 2 is a diagram illustrating a conventional example of a matching circuit of a high-output integrated circuit mounted device including a line in a bent shape. In FIG. 2, an integrated circuit chip 11 includes a plurality of transistors. The left side of the integrated circuit chip 11 is an input matching circuit 20 and the right side is an output matching circuit 30. The input matching circuit 20 includes a 1/4 wavelength line 22 in a bent shape formed on a substrate 21, a 1/4 wavelength line 24 in a linear shape formed on a substrate 23, a plurality of bonding wires 25 for connecting the 1/4 wavelength line 22 and the 1/4 wavelength line 24, and a plurality of bonding wires 26 for connecting the 1/4 wavelength line 24 and the input terminal of the integrated circuit chip 11. An end part IN on the left side of the 1/4 wavelength line 22 is an input part and connected to the terminal of the package of the integrated circuit mounted device with a wire bonding, etc. The output matching circuit 30 includes an electrode 32 in a tapered shape formed on a substrate 31, a 1/4 wavelength line 34 in a linear shape formed on a substrate 33, a 1/4 wavelength line 36 in a bent shape formed on a substrate 35, a plurality of bonding wires 37 for connecting the output terminal of the integrated circuit chip 11 and the electrode 32, a plurality of bonding wires 38 for connecting the electrode 32 and the 1/4 wavelength line 34, and a plurality of bonding wires 39 for connecting the 1/4 wavelength line 34 and the 1/4 wavelength line 36. An end part OUT on the right side of the 1/4 wavelength line 36 is an output part and connected to the terminal of the package of the integrated circuit mounted device with a wire bonding etc.

"Normally, connection is realized by a plurality of bonding wires. For example, in the conventional example in FIG. 2, the integrated circuit chip 11 and the 1/4 wavelength line 24, and the integrated circuit chip 11 and the 1/4 wavelength line 32 are connected by the eight bonding wires 26 and 37, respectively. Further, for the connection of the 1/4 wavelength line 22 and the 1/4 wavelength line 24, the four bonding wires 25 are used and for the connection of the electrode 32 and the 1/4 wavelength line 34 and the connection of the 1/4 wavelength line 34 and the 1/4 wavelength line 36, the five bonding wires 38 and 39 are used, respectively.

"However, there is such a problem that the size of the matching circuit may not be reduced sufficiently even if the line in a bent shape as illustrated in FIG. 2 is used. The problem in particular relating to the size of the matching circuit is the distance from the left end to the right end in FIG. 2, i.e., the length in the direction of the signal path from the input terminal to the output terminal of the package. For example, in the conventional example in FIG. 2, the length of the 1/4 wavelength line 22 in this direction is 6.6 mm, the length of the 1/4 wavelength line 36 in this direction is 7 mm, and the total length is 21.8 mm.

"For an integrated circuit, specifications of a general package size are determined and it is desirable to meet the specifications in practical use. Because of this, as illustrated in FIG. 2, the layout is made by using a pattern layout in which a long line is bent, however, there arises the problem that the line is not reduced in length sufficiently and it may not be accommodated in a package."

As a supplement to the background information on this patent, VerticalNews correspondents also obtained the inventor's summary information for this patent: "According to an aspect of the embodiments, a transmission line has a plurality of branch lines that respectively include a first end part and a second end part and have a substantially same line length, wherein at least part of the plurality of branch lines include bent shapes, the first end parts of the plurality of branch lines are connected to a common terminal, and the second end parts of the plurality of branch lines are connected to a common terminal.

"The object and advantages of the embodiments will be realized and attained by means of the elements and combination particularly pointed out in the claims.

"It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention, as claimed."

For additional information on this patent, see: Masuda, Satoshi. Transmission Line, Impedance Transformer, Integrated Circuit Mounted Device, and Communication Device Module. U.S. Patent Number 8816793, filed February 1, 2011, and published online on August 26, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8816793.PN.&OS=PN/8816793RS=PN/8816793

Keywords for this news article include: Fujitsu Limited.

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Source: Journal of Engineering


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