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Patent Application Titled "STORAGE AT M BITS/CELL DENSITY IN N BITS/CELL ANALOG MEMORY CELL DEVICES, M>N" Published Online

September 9, 2014



By a News Reporter-Staff News Editor at Information Technology Newsweekly -- According to news reporting originating from Washington, D.C., by VerticalNews journalists, a patent application by the inventors Shalvi, Ofir (Ra'anana, IL); Sommer, Naftali (Rishon Le-Zion, IL); Perlmutter, Uri (Ra'anana, IL); Sokolov, Dotan (Ra'anana, IL), filed on April 29, 2014, was made available online on August 28, 2014.

The assignee for this patent application is Apple Inc.

Reporters obtained the following quote from the background information supplied by the inventors: "Several types of memory devices, such as Flash memories, use arrays of analog memory cells for storing data. Each analog memory cell stores a quantity of an analog value, also referred to as a storage value, such as an electrical charge or voltage. This analog value represents the information stored in the cell. In Flash memories, for example, each analog memory cell holds a certain amount of electrical charge. The range of possible analog values is typically divided into intervals, each interval corresponding to one or more data bit values. Data is written to an analog memory cell by writing a nominal analog value that corresponds to the desired bit or bits.

"Some memory devices, commonly referred to as Single-Level Cell (SLC) devices, store a single bit of information in each memory cell, i.e., each memory cell can be programmed to assume either of two possible programming levels. Higher-density devices, often referred to as Multi-Level Cell (MLC) devices, store two or more bits per memory cell, i.e., can be programmed to assume more than two possible programming levels."

In addition to obtaining background information on this patent application, VerticalNews editors also obtained the inventors' summary information for this patent application: "An embodiment of the present invention provides a method for data storage, including:

"accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands, each of which programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells; and

"programming the subset of the memory cells to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.

"In some embodiments, the memory further supports a list of built-in read commands, each of which read commands reads a respective one of the group of the N pages, and the method includes reading the M pages from the subset of the memory cells by performing a series of read commands drawn only from the list. In an embodiment, performing the series of the read commands includes notifying the memory of one or more read threshold values to be applied in at least one of the read commands in the series.

"In a disclosed embodiment, programming the subset of the memory cells includes caching the data in the memory in no more than N page buffers. In another embodiment, programming the subset of the memory cells includes notifying the memory of one or more programming threshold values to be applied in at least one of the programming commands in the sequence. In yet another embodiment, programming the subset of the memory cells includes applying a series of programming pulses to the memory cells in the subset, and notifying the memory of a characteristic of the programming pulses to be applied during at least one of the programming commands in the sequence. In an embodiment, a given programming command in the sequence involves reading a previously-programmed page from the subset of the memory cells using one or more read thresholds, and programming the subset of the memory cells includes notifying the memory of respective values of the one or more read thresholds.

"In a disclosed embodiment, programming the subset of the memory cells includes, during a given programming command in the sequence, modifying respective storage values of only some of the memory cells in the subset by programming the other memory cells in the subset with respective data values that cause their storage values to remain unchanged by the given programming command. In an embodiment, the method includes configuring the memory to operate in one of first and second operational modes, and programming the subset of the memory cells includes storing a maximum of M pages in the subset of the memory cells when operating in the first operational mode, and storing a maximum of N pages in the subset of the memory cells when operating in the second operational mode.

"There is additionally provided, in accordance with an embodiment of the present invention, a data storage apparatus, including:

"an interface for communicating with a memory that includes multiple analog memory cells and supports a set of built-in programming commands, each of which programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells; and

"a processor, which is configured to accept data for storage in the memory, and to program the subset of the memory cells to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.

"There is also provided, in accordance with an embodiment of the present invention, a data storage apparatus, including:

"a memory, which includes multiple analog memory cells and supports a set of built-in programming commands, each of which programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells; and

"a processor, which is configured to accept data for storage in the memory, and to program the subset of the memory cells to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.

"There is further provided, in accordance with an embodiment of the present invention, a method for data storage, including:

"accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands for programming the memory cells to a first number of programming states; and

"programming the memory cells to a second number of programming states, which is less than the first number and is not an integer power of two, by performing a sequence of the programming commands drawn only from the set.

"There is additionally provided, in accordance with an embodiment of the present invention, a method for data storage, including:

"accepting a request to retrieve data from a memory, which includes multiple analog memory cells, holds M pages of the data in a subset of the memory cells, and supports a list of built-in read commands, each of which read commands reads a respective one of N pages, N
"responsively to the request, reading the M pages from the subset of the memory cells by performing a series of read commands drawn only from the list.

"The present invention will be more fully understood from the following detailed description of the embodiments thereof, taken together with the drawings in which:

BRIEF DESCRIPTION OF THE DRAWINGS

"FIG. 1 is a block diagram that schematically illustrates a memory system, in accordance with an embodiment of the present invention;

"FIG. 2 is a diagram showing programming levels and a set of built-in programming commands, in accordance with an embodiment of the present invention;

"FIG. 3 is a diagram showing a process of storing data at three bits/cell using two bits/cell programming commands, in accordance with an embodiment of the present invention;

"FIG. 4 is a flow chart that schematically illustrates a method for storing data at three bits/cell using two bits/cell programming commands, in accordance with an embodiment of the present invention;

"FIG. 5 is a diagram showing programming levels and a set of built-in read commands, in accordance with an embodiment of the present invention;

"FIG. 6 is a diagram showing a process of reading data stored at three bits/cell using two bits/cell read commands, in accordance with an embodiment of the present invention;

"FIG. 7 is a flow chart that schematically illustrates a method for reading data stored at three bits/cell using two bits/cell programming commands, in accordance with an embodiment of the present invention;

"FIGS. 8-10 are diagrams showing processes of data storage at three bits/cell using two bits/cell programming commands, in accordance with alternative embodiments of the present invention;

"FIG. 11 is a timing diagram of a process for storing data at three bits/cell using two bits/cell programming commands, in accordance with an embodiment of the present invention; and

"FIG. 12 is a timing diagram of a process for reading data stored at three bits/cell using two bits/cell read commands, in accordance with an embodiment of the present invention."

For more information, see this patent application: Shalvi, Ofir; Sommer, Naftali; Perlmutter, Uri; Sokolov, Dotan. STORAGE AT M BITS/CELL DENSITY IN N BITS/CELL ANALOG MEMORY CELL DEVICES, M>N. Filed April 29, 2014 and posted August 28, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=373&p=8&f=G&l=50&d=PG01&S1=20140821.PD.&OS=PD/20140821&RS=PD/20140821

Keywords for this news article include: Apple Inc., Information Technology, Information and Data Storage.

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Source: Information Technology Newsweekly


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