The patent's assignee is
News editors obtained the following quote from the background information supplied by the inventors: "The present invention relates to multi-core processing and, more particularly, to scheduling in manycore processors.
"New manycore processors are devices with more than 50 processing cores supporting more than 200 hardware threads. In particular, and unlike the GPU and other manycore designs, The Intel.RTM. Xeon Phi.TM. includes several design choices that make the Xeon Phi.TM. easier to program. First, its cores are x86 compatible. Second, it runs the Linux operating system, enabling easy multiprocessing with services such as virtual memory and context switching. Third, it supports OpenMP, a popular parallel programming model. Intel.RTM. also provides middleware to manage data transfers between the host and coprocessor. Consequently, the Xeon Phi.TM. is widely perceived to be more usable across a range of parallel applications, especially when compared to other manycore offerings in the recent past.
"Many suitable applications for the Xeon Phi.TM. can be expressed using a bag-of-tasks framework. Bag-of-tasks applications are those whose tasks are completely independent. Although conceptually simple, this framework is typical of a large class of problems such as satellite imaging, Berkely Open Infrastructure for Network Computing (BOINC)-like computations, image processing, networking, and others. Tasks belonging to bag-of-tasks applications typically have real-time constraints, which we refer to as the task deadline. For example, a satellite may produce a certain amount of data periodically, say once each revolution; to avoid backlog, the system must complete processing the data before the satellite comes around again and dumps the next round of data. Therefore, in the bag-of-task application scenarios, one requirement is to complete the processing of a task before its deadline."
As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "A method for scheduling jobs to manycore nodes in a cluster includes selecting a job to run according to the job's wait time and the job's expected execution time; sending job requirements to all nodes in a cluster, wherein each node comprises a manycore processor; determining at each node whether said node has sufficient resources to ever satisfy the job requirements and, if no node has sufficient resources, deleting the job; creating a list of nodes that have sufficient free resources at a present time to satisfy the job requirements; and assigning the job to a node using a processor, based on a difference between an expected execution time and associated confidence value for each node and a hypothetical fastest execution time and associated hypothetical maximum confidence value.
"A system for scheduling jobs to manycore nodes in a cluster includes a scheduler comprising a processor configured to select a job to run according to the job's wait time and the job's expected execution time, to determine whether any node has sufficient resources to ever satisfy job requirements associated with the job and, if no node has sufficient resources, to delete the job, to create a list of nodes that have sufficient free resources at a present time to satisfy the job requirements, and to assign the job to a node using a processor, said assignment being based on a difference between an expected execution time and associated confidence value for each node and a hypothetical fastest execution time and associated hypothetical maximum confidence value.
"These and other features and advantages will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings.
BRIEF DESCRIPTION OF DRAWINGS
"The disclosure will provide details in the following description of preferred embodiments with reference to the following figures wherein:
"FIG. 1A shows an exemplary process manager for a multiprocessor system;
"FIGS. 1B-1D show in more detail the process manager of FIG. 1A;
"FIG. 2 shows an exemplary software stack with host and co-processor components of the multiprocessor software stack;
"FIG. 3 shows an exemplary flow of the process manager of FIG. 1A;
"FIG. 4 shows an exemplary architecture of the process manager of FIG. 1A;
"FIG. 5A-5H show exemplary scheduling procedures for the system of FIG. 1A;
"FIG. 6 shows an exemplary case of nodes having different estimated completion times and confidence values;
"FIG. 7 shows a negotiation procedure in accordance with the present principles; and
"FIG. 8 shows a scheduling system in accordance with the present principles."
For additional information on this patent application, see: Cadambi, Srihari; Rao, Kunal; Chakradhar, Srimat; Phull, Rajat; Coviello, Giuseppe; Sankaradass, Murugan; Li, Cheng-Hong. Simultaneous Scheduling of Processes and Offloading Computation on Many-Core Coprocessors. Filed
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