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Researchers Submit Patent Application, "Led Chip Resistant to Electrostatic Discharge and Led Package Including the Same", for Approval

September 10, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Washington, D.C., VerticalNews journalists report that a patent application by the inventors Suh, Duk Il (Ansan-si, KR); Kim, Kyoung Wan (Ansan-si, KR); Yoon, Yeo Jin (Ansan-si, KR); Woo, Sang Won (Ansan-si, KR); Kim, Shin Hyoung (Ansan-si, KR), filed on February 14, 2014, was made available online on August 28, 2014.

The patent's assignee is Seoul Viosys Co., Ltd.

News editors obtained the following quote from the background information supplied by the inventors: "Exemplary embodiments of the present invention relate to a light emitting device, and more particularly, to a light emitting diode chip that is resistant to electrostatic discharge, and a light emitting diode package including the same.

"Generally, GaN-based compound semiconductors are formed by epitaxial growth on a sapphire substrate, which has a similar crystal structure and lattice parameter thereto, in order to reduce lattice defects. However, epitaxial layers grown on the sapphire substrate may have many types of crystal defects, such as V-fits, threading dislocations, and the like. When high voltage static electricity is applied to a light emitting diode from outside, current is concentrated in crystal defects in the epitaxial layers, thereby causing diode breakdown.

"Recently, the number of applications of high brightness/high output light emitting diodes (LEDs) has increased, not only to backlight units of LED TVs, but also to luminaries, automobiles, electric signboards, facilities, and the like. Accordingly, there is an increasing demand for the protection of light emitting devices against static electricity.

"For LEDs, it is desirable to secure a semi-permanent lifespan using an ESD protection device having excellent electric reliability. It is very important to secure reliability of LEDs with respect to electrostatic discharge (ESD), electrical fast transient (EFT), which refers to sparks occurring in a switch, and electrical surges resulting from lightning and the like.

"Generally, when packaging a light emitting diode, a separate Zener diode is mounted together with the light emitting diode to prevent electrostatic discharge. However, the Zener diode is expensive and several processes are used for mounting, thereby increasing manufacturing costs, as well as the number of processes for packaging the light emitting diode.

"Moreover, because the Zener diode is disposed near the light emitting diode in an LED package, luminous efficacy of the package is reduced as a result of absorption of light by the Zener diode, thereby deteriorating light yield of the LED package.

"On the other hand, various attempts have been made to provide a light emitting diode chip resistant to ESD using a stacked structure of epitaxial layers in the light emitting diode chip. For example, a super lattice layer may be disposed between an n-type semiconductor layer and an active layer. With this structure, the super lattice layer can reduce lattice defects in the active layer, thereby providing a light emitting diode chip resistant to ESD. However, this technique still does not provide good yield.

"The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and, therefore, it may contain information that does not constitute prior art."

As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "Exemplary embodiments of the present invention provide a light emitting diode chip having high resistance to electrostatic discharge at a chip level, and a light emitting diode package including the same.

"Exemplary embodiments of the present invention also provide a light emitting diode chip having high resistance to electrostatic discharge, and which is free from reduction in light output or an increase in forward voltage, and a light emitting diode package including the same.

"Exemplary embodiments of the present invention also provide a light emitting diode chip having high resistance to electrostatic discharge, and which exhibits improved luminous efficacy at the chip level and/or package level, and a light emitting diode package including the same.

"Additional features of the invention will be set forth in the description which follows, and in part will become apparent from the description, or may be learned from practice of the invention.

"An exemplary embodiment of the present invention discloses a light emitting diode chip including: a substrate; a light emitting diode section disposed on the substrate; and an inverse parallel diode section disposed on the substrate and connected inversely parallel to the light emitting diode section. In the light emitting diode chip, the light emitting diode section is disposed together with the inverse parallel diode section, whereby the light emitting diode chip exhibits high resistance to electrostatic discharge.

"The substrate may be a growth substrate capable of growing a nitride semiconductor layer thereon, and may be, for example, a patterned sapphire substrate (PSS).

"Each of the light emitting diode section and the inverse parallel diode section may include a first conductivity type nitride semiconductor layer; a second conductivity type nitride semiconductor layer; and an active layer disposed between the first conductivity type nitride semiconductor layer and the second conductivity type nitride semiconductor layer. The light emitting diode section and the inverse parallel diode section may have the same stack structure, and may be formed using epitaxial layers which are grown together through the same growth process. On the other hand, the second conductivity type nitride semiconductor layer of the light emitting diode section and the second conductivity type nitride semiconductor layer of the inverse parallel diode section may have different thicknesses. For example, the second conductivity type nitride semiconductor layer of the inverse parallel diode section may have a smaller thickness than that of the light emitting diode section. With this structure, the inverse parallel diode section may have a lower height than the light emitting diode section.

"The light emitting diode chip may further include a first electrode pad and a second electrode pad, wherein the first electrode pad may be disposed on the inverse parallel diode section, and the second electrode pad may be disposed on the light emitting diode section.

"Because the first electrode pad is disposed on the inverse parallel diode section, it is possible to secure a larger activation area than in the case where the first electrode pad is formed on the light emitting diode section.

"The light emitting diode chip may further include a first extension extending from the first electrode pad; and a second extension extending from the second electrode pad. The first extension may be electrically connected to the first conductivity type nitride semiconductor layer of the light emitting diode section, and the second extension may be electrically connected to the first conductivity type nitride semiconductor layer of the inverse parallel diode section.

"The first electrode pad and the second extension may be horizontally separated from each other. A portion of the first electrode pad may be disposed on the second extension electrically connected to the first conductivity type nitride semiconductor layer of the inverse parallel diode section. In addition, the light emitting diode chip may further include an isolation layer insolating the first electrode pad from the second extension.

"In addition, the first extension may be connected to the first conductivity type nitride semiconductor layer at a plurality of points on the light emitting diode section.

"The first extension may pass through an upper portion of the second conductivity type nitride semiconductor layer of the light emitting diode section, and the first extension may be electrically insulated from the second conductivity type nitride semiconductor layer by the insulation layer. Alternatively, the first extension may be linearly connected to the first conductivity type nitride semiconductor layer of the light emitting diode section.

"The light emitting diode chip may further include a second transparent electrode layer disposed between the first electrode pad and the second conductivity type nitride semiconductor layer of the inverse parallel diode section. The second transparent electrode layer helps the first electrode pad to electrically connect to the second conductivity type nitride semiconductor layer. When the first electrode pad is electrically connected to the second conductivity type nitride semiconductor layer, the second transparent electrode layer may be omitted.

"The light emitting diode chip may further include a first transparent electrode layer connected to an upper surface of the second conductivity type nitride semiconductor layer of the light emitting diode section. The second electrode pad may be disposed on the first transparent electrode layer. In addition, the light emitting diode chip may further include a current blocking layer disposed under a region for the first transparent electrode layer below the second electrode pad.

"The light emitting diode chip may further include a current blocking layer disposed under a region for the first transparent electrode layer below the second extension.

"The light emitting diode chip may further include a reflector covering at least a portion of the inverse parallel diode section. With the reflector disposed to cover the inverse parallel diode section, the light emitting diode chip has improved luminous efficacy.

"The reflector may be a distributed Bragg reflector (DBR).

"At least a portion of the reflector may extend to the light emitting diode section to insulate the second extension from a side surface of the light emitting diode section. In other words, the reflector may be disposed between the second extension and the side surface of the light emitting diode section. Furthermore, the reflector may extend to an upper side of the second conductivity type semiconductor layer of the light emitting diode section.

"Furthermore, at least a portion of the reflector may extend to the light emitting diode section to insulate the first extension from the light emitting diode section. The first extension may be insulated from the second conductivity type semiconductor layer of the light emitting diode section by the reflector.

"The reflector may cover the inverse parallel diode section so as to enclose the first electrode pad and may have an opening, through which the first conductivity type nitride semiconductor layer connected to the second extension is exposed. The reflector may cover substantially an overall region of the inverse parallel diode section except for the first electrode pad region and the opening.

"In addition, the current blocking layer may be a distributed Bragg reflector (DBR).

"At least one of the first and second extensions may include a reflective metal layer formed on an upper side thereof.

"An exemplary embodiment of the present invention also discloses a light emitting diode chip including a substrate; a light emitting diode section disposed on the substrate; an inverse parallel diode section disposed on the substrate; a first electrode pad disposed on the inverse parallel diode section; a second electrode pad disposed on the light emitting diode section; a first extension extending from the first electrode pad and connected to the light emitting diode section; and a second extension extending from the second electrode pad and connected to the inverse parallel diode section. The inverse parallel diode section may be connected inversely parallel to the light emitting diode section. When the inverse parallel diode section is formed on a region on which the first electrode pad is formed, the light emitting diode chip exhibits high resistance to electrostatic discharge, while preventing a reduction in light emitting area.

"An exemplary embodiment of the present invention also discloses a light emitting diode package including a chip mounting section having a chip mounting face and a light emitting diode chip mounted on the chip mounting face. The light emitting diode chip may include a substrate; a light emitting diode section disposed on the substrate; and an inverse parallel diode section disposed on the substrate and connected inversely parallel to the light emitting diode section. The light emitting diode chip may further include a reflector covering at least a portion of the inverse parallel diode section.

"By adopting the light emitting diode chip, there is no need to mount a separate Zener diode inside the package, thereby preventing increase in optical loss or process cost due to mounting of the Zener diode.

"It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.

BRIEF DESCRIPTION OF THE DRAWINGS

"The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention, and together with the description serve to explain the principles of the invention.

"FIG. 1 is a schematic plan view of a light emitting diode chip according to an exemplary embodiment of the present invention.

"FIG. 2 is a schematic sectional view taken along line A-A of FIG. 1.

"FIG. 3 is a schematic sectional view taken along line B-B of FIG. 1.

"FIG. 4 is a schematic sectional view taken along line C-C of FIG. 1.

"FIG. 5 is a schematic circuit diagram of a light emitting diode chip according to an exemplary embodiment of the present invention.

"FIGS. 6(a) and 6(b) are schematic plan views of light emitting diode chips according to an exemplary embodiment of the present invention.

"FIG. 7 is a graph depicting I-V characteristics of a typical light emitting diode chip and light emitting diode chips according to an exemplary embodiment of the present invention.

"FIG. 8 is a sectional view of a light emitting diode chip according to an exemplary embodiment of the present invention.

"FIG. 9 is a partial plan view of a light emitting diode chip according to an exemplary embodiment of the present invention.

"FIG. 10 is a schematic sectional view taken along line D-D of FIG. 9.

"FIG. 11 is a partial plan view of a light emitting diode chip according to an exemplary embodiment of the present invention.

"FIG. 12 is a schematic sectional view taken along line E-E of FIG. 10.

"FIG. 13 is a schematic sectional view taken along line F-F of FIG. 10.

"FIG. 14 is a schematic sectional view of a light emitting diode package according to an exemplary embodiment of the present invention.

"FIG. 15 is a schematic sectional view of a light emitting diode package according to an exemplary embodiment of the present invention."

For additional information on this patent application, see: Suh, Duk Il; Kim, Kyoung Wan; Yoon, Yeo Jin; Woo, Sang Won; Kim, Shin Hyoung. Led Chip Resistant to Electrostatic Discharge and Led Package Including the Same. Filed February 14, 2014 and posted August 28, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=5843&p=117&f=G&l=50&d=PG01&S1=20140821.PD.&OS=PD/20140821&RS=PD/20140821

Keywords for this news article include: Electronics, Light-emitting Diode, Semiconductor, Seoul Viosys Co., Seoul Viosys Co. Ltd.

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Source: Electronics Newsweekly


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