Patent number 8819322 is assigned to
The following quote was obtained by the news editors from the background information supplied by the inventors: "Exemplary embodiments relate to a semiconductor device, and, more particularly, relate to a system on chip including an interconnector and a control method thereof.
"A system on chip SOC may use semiconductor techniques that enable a complicated system with various functions to be realized in one chip. Effective connecting of various intellectual properties (IPs) formed within a chip may become an important issue for the high functionality and the high performance of a system on chip. Typically, interconnector techniques for connecting intellectual properties are mainly bus-based connections.
"Meanwhile, the advanced microcontroller bus architecture (AMBA) introduced by
"With the multiple outstanding address function, addresses corresponding to a plurality of transactions may be provided at the same time. The multiple outstanding address function may mean that addresses on a plurality of transactions are continuously transferred through an address channel together with a data transfer when information is provided through an address channel and a data channel. It is possible to use a free transfer time generated between addresses on a plurality of transactions by the above-described function.
"With the data interleaving function, data provided from a master IP may be uniformly assigned to a plurality of slave intellectual properties. It is possible to use bandwidth more effectively by using the data interleaving function."
In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "One aspect of embodiments of the inventive concept is directed to providing a system on chip comprising a plurality of master devices; a plurality of slave devices that supply data in response to requests of the plurality of master devices; and pointer update logic configured to process the requests from the plurality of master devices sequentially in a pipeline manner.
"Another aspect of embodiments of the inventive concept is directed to providing a method of controlling an interconnector of a system on chip configured to transfer requests from a master device to a plurality of slave devices. The method comprises storing a first payload corresponding to a first request in a temporal register; selectively storing the first payload stored in the temporal register in a register slice unit and storing a second payload corresponding to a second request in the temporal register; and comparing a third payload corresponding to a third request with the first payload stored in the register slice unit and the second payload stored in the temporal register."
URL and more information on this patent, see: Yun, Jaegeun; Hong, Sung-Min; Jeong, Bub-chul. System on Chip Comprising Interconnector and Control Method. U.S. Patent Number 8819322, filed
Keywords for this news article include: Electronics,
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