News Column

Patent Issued for Integrated Circuit Die Stacks with Rotationally Symmetric VIAS

September 11, 2014



By a News Reporter-Staff News Editor at Computer Weekly News -- A patent by the inventors Foster, Sr., Jimmy G. (Morrisville, NC); Kim, Kyu-Hyoun (Mount Kisco, NY), filed on March 20, 2013, was published online on August 26, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8816490 is assigned to International Business Machines Corporation (Armonk, NY).

The following quote was obtained by the news editors from the background information supplied by the inventors: "The field of the invention is design, fabrication, and operation of integrated circuit, or, more specifically, structure and methods of making and operating integrated circuit die stacks with rotationally symmetric vias.

"The development of the EDVAC computer system of 1948 is often cited as the beginning of the computer era. Since that time, computer systems have evolved into extremely complicated devices. Today's computers are much more sophisticated than early systems such as the EDVAC. Computer systems typically include a combination of hardware and software components, application programs, operating systems, processors, buses, memory, input/output devices, and so on. As advances in semiconductor processing and computer architecture push the performance of the computer higher and higher, more sophisticated computer software has evolved to take advantage of the higher performance of the hardware, resulting in computer systems today that are much more powerful than just a few years ago.

"One of the areas of computer technology that sees continual advancement is packaging of integrated circuits. Packaging many integrated circuits into a confined space is becoming more difficult as many devices continue to shrink in size or need to communicate with more chips. An example would be stacking multiple memory chips in one package to provide more locations to store data. Prior art has shown how to stack multiple chips on top of each other with package stacking, one die per package. Other prior art has shown how to stack multiple dies into one package by tying signal lines together between or among dies within the package, for example, wrapping signal lines outside the dies, or placing redistribution layers between the dies. A more recent approach for wafer stacking is to connect the signals together with vias, effectively sending a bus of signal lines vertically through a stack of dies. All of these approaches have the drawback of more heavily loading busses as more dies are stacked reducing signal quality and bus speeds."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "An integrated circuit die stack, including methods of making and operating, including a first integrated circuit die mounted upon a substrate, the first die including pass-through vias (`PTVs`), each PTV composed of a conductive pathway through the first die with no connection to any circuitry on the first die; and a second integrated circuit die, identical to the first die, rotated with respect to the first die and mounted upon the first die, with the PTVs in the first die connecting signal lines from the substrate through the first die to through silicon vias (`TSVs`) in the second die, each TSV on the second die composed of a conductive pathway through the second die that is also connected to electronic circuitry on the second die; with the TSVs and PTVs disposed upon each identical die so that the positions of the TSVs and PTVs on each identical die are rotationally symmetrical with respect to the TSVs and PTVs on the other identical die.

"The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular descriptions of exemplary embodiments of the invention as illustrated in the accompanying drawings wherein like reference numbers generally represent like parts of exemplary embodiments of the invention."

URL and more information on this patent, see: Foster, Sr., Jimmy G.; Kim, Kyu-Hyoun. Integrated Circuit Die Stacks with Rotationally Symmetric VIAS. U.S. Patent Number 8816490, filed March 20, 2013, and published online on August 26, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8816490.PN.&OS=PN/8816490RS=PN/8816490

Keywords for this news article include: International Business Machines Corporation, Software.

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Source: Computer Weekly News


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