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Patent Issued for Apparatus and Methods for Buffer Linearization

August 13, 2014



By a News Reporter-Staff News Editor at Journal of Engineering -- From Alexandria, Virginia, VerticalNews journalists report that a patent by the inventor Foroudi, Omid (Greensboro, NC), filed on March 4, 2013, was published online on July 29, 2014.

The patent's assignee for patent number 8791758 is Analog Devices, Inc. (Norwood, MA).

News editors obtained the following quote from the background information supplied by the inventors: "Embodiments of the invention relate to electronic systems, and more particularly, to amplifiers.

"Certain electronic systems, such as mixers, modulators and/or demodulators, can include an amplifier for amplifying a relatively weak signal. For example, a radio frequency (RF) system can include an amplifier for amplifying the output of a mixer to generate an amplified signal.

"There is a need for improved amplifiers. Furthermore, there is a need for amplifiers having high linearity and/or wide bandwidth."

As a supplement to the background information on this patent, VerticalNews correspondents also obtained the inventor's summary information for this patent: "In one embodiment, an apparatus includes a gain circuit and a buffer circuit. The gain circuit includes a first gain transistor and a second gain transistor. An emitter of the first gain transistor is electrically connected to an emitter of the second gain transistor, and the first and second gain transistors have a first type of device polarity. The buffer circuit includes a first buffer transistor, a second buffer transistor, a first linearization transistor, and a second linearization transistor. The first buffer transistor includes an emitter electrically connected to a base of the first gain transistor and a base configured to receive a first input signal. The second buffer transistor includes an emitter electrically connected to a base of the second gain transistor and a base configured to receive a second input signal. The first and second buffer transistors have a second type of device polarity opposite the first type of device polarity. The first linearization transistor includes a collector electrically connected to the base of the first gain transistor and a base electrically connected to a collector of the first buffer transistor. The second linearization transistor includes a collector electrically connected to the base of the second gain transistor and a base electrically connected to a collector of the second buffer transistor. The first and second linearization transistors have the first type of device polarity.

"In another embodiment, an apparatus includes a gain circuit and a buffer circuit. The gain circuit includes a first gain transistor and a second gain transistor. A source of the first gain transistor is electrically connected to a source of the second gain transistor, and the first and second gain transistors have a first type of device polarity. The buffer circuit includes a first buffer transistor including a source electrically connected to a gate of the first gain transistor and a gate configured to receive a first input signal. The second buffer transistor includes a source electrically connected to a gate of the second gain transistor and a gate configured to receive a second input signal. The first and second buffer transistors have a second type of device polarity opposite the first type of device polarity. The first linearization transistor includes a drain electrically connected to the gate of the first gain transistor and a gate electrically connected to a drain of the first buffer transistor. The second linearization transistor includes a drain electrically connected to the gate of the second gain transistor and a gate electrically connected to a drain of the second buffer transistor. The first and second linearization transistors have the first type of device polarity.

"In another embodiment, a method of electronic amplification is provided. The method includes buffering a differential input signal to generate a differential buffered signal using a buffer circuit, and amplifying the differential buffered signal to generate an amplified differential signal using a gain circuit. The buffer circuit includes a first buffer transistor, a second buffer transistor, a first linearization transistor, and a second linearization transistor. The differential input signal is received between a base of the first buffer transistor and a base of the second buffer transistor, and the differential buffered signal is generated between an emitter of the first buffer transistor and an emitter of the second buffer transistor. The emitter of the first buffer transistor is electrically connected to a collector of the first linearization transistor, and the emitter of the second buffer transistor is electrically connected to a collector of the second linearization transistor. The first and second linearization transistors have a first type of device polarity, and the first and second buffer transistors have a second type of device polarity opposite the first type of device polarity. The gain circuit includes a first gain transistor and a second gain transistor, and the differential buffered signal is received between a base of the first gain transistor and a base of the second gain transistor. The amplified differential signal is generated between a collector of the first gain transistor and a collector of the second gain transistor, and the first and second gain transistors have the first type of polarity.

"In another embodiment, a method of electronic amplification is provided. The method includes buffering a differential input signal to generate a differential buffered signal using a buffer circuit, and amplifying the differential buffered signal to generate an amplified differential signal using a gain circuit. The buffer circuit includes a first buffer transistor, a second buffer transistor, a first linearization transistor, and a second linearization transistor. The differential input signal is received between a gate of the first buffer transistor and a gate of the second buffer transistor, and the differential buffered signal is generated between a source of the first buffer transistor and a source of the second buffer transistor. The source of the first buffer transistor is electrically connected to a drain of the first linearization transistor, and the source of the second buffer transistor is electrically connected to a drain of the second linearization transistor. The first and second linearization transistors have a first type of device polarity, and the first and second buffer transistors have a second type of device polarity opposite the first type of device polarity. The gain circuit includes a first gain transistor and a second gain transistor. The differential buffered signal is received between a gate of the first gain transistor and a gate of the second gain transistor, and the amplified differential signal is generated between a drain of the first gain transistor and a drain of the second gain transistor. The first and second gain transistors have the first type of polarity."

For additional information on this patent, see: Foroudi, Omid. Apparatus and Methods for Buffer Linearization. U.S. Patent Number 8791758, filed March 4, 2013, and published online on July 29, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8791758.PN.&OS=PN/8791758RS=PN/8791758

Keywords for this news article include: Analog Devices Inc., Medical Device Companies.

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Source: Journal of Engineering


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