News Column

Patent Issued for Wiring Substrate Including Projecting Part Having Electrode Pad Formed Thereon

September 3, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- A patent by the inventors Kaneko, Kentaro (Nagano, JP); Kobayashi, Kazuhiro (Nagano, JP), filed on November 20, 2012, was published online on August 19, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8810040 is assigned to Shinko Electric Industries Co., Ltd. (Nagano, JP).

The following quote was obtained by the news editors from the background information supplied by the inventors: "Conventionally, there is known a so-called built-up wiring substrate in which plural wiring layers and plural insulating layers are alternately layered one on top of the other, and adjacent wiring layers are connected to each other by way of a via hole penetrating an insulating layer sandwiched between the adjacent wiring layers.

"In a case of connecting a semiconductor chip to the built-up wiring substrate by using a flip-chip method, the semiconductor chip and the built-up wiring substrate are connected by forming bumps on corresponding electrode pads of the built-up wiring substrate and the semiconductor chip, and bonding the corresponding electrode pads of the built-up wiring substrate and the semiconductor chip.

"As described, in, for example, Patent Document 1, the process of forming bumps on the side of the built-up wiring substrate is proposed to be omitted by having the electrode pads of the built-up wiring substrate protrude from a surface of the built-up wiring substrate. In this case, bumps are formed only on the side of the semiconductor chip. Thereby, the bumps formed on the semiconductor chip can be bonded to the electrode pads of the built-up wiring substrate. Patent Document 1: Japanese Laid-Open Patent Publication No. 2006-196860

"In the process for forming electrode pads that protrude from the surface of the built-up wiring substrate, recess parts are formed by etching a support body that is used during the manufacturing of the built-up wiring substrate. Then, electrode pads are formed in the recess parts. Then, the support body is removed. Thereby, the electrode pads that protrude from the surface of the built-up wiring substrate can be formed into shapes corresponding to the shapes of the recess parts.

"However, in the case of forming the recess parts, the depths and widths of the recess parts may become different from each other because the recess parts are formed by etching the support body. Thus, the shapes of the recess parts may vary. This also causes the shapes (e.g., height, width) of the electrode pads to vary. As a result, the bonding strengths become different among the electrode pads when mounting the semiconductor chip on the built-up wiring substrate. This leads to degradation of bonding strength (i.e. bonding reliability) between the electrode pads and the semiconductor chip."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "According to an aspect of the invention, there is provided a wiring substrate including an insulating layer having a first surface on which a projecting part is formed, and an electrode pad being formed on the projecting part and including a first electrode pad surface and a second electrode pad surface on a side opposite to the first electrode pad surface, wherein the first electrode pad surface is exposed from the projecting part of the insulating layer, wherein the second electrode pad surface is covered by the insulating layer, wherein a cross-section of the projecting part is a tapered shape, wherein one side of the cross-section toward the first electrode pad surface is narrower than another side of the cross-section toward the first surface of the insulating layer.

"The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims.

"It is to be understood that both the foregoing generation description and the followed detailed description are exemplary and explanatory and are not restrictive of the invention as claimed."

URL and more information on this patent, see: Kaneko, Kentaro; Kobayashi, Kazuhiro. Wiring Substrate Including Projecting Part Having Electrode Pad Formed Thereon. U.S. Patent Number 8810040, filed November 20, 2012, and published online on August 19, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8810040.PN.&OS=PN/8810040RS=PN/8810040

Keywords for this news article include: Electronics, Semiconductor, Shinko Electric Industries Co. Ltd.

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Source: Electronics Newsweekly


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