The assignee for this patent, patent number 8811062, is
Reporters obtained the following quote from the background information supplied by the inventors: "The inventive concept relates to semiconductor devices. More particularly, the inventive concept relates to variable resistance memory devices and to methods of manufacturing the same.
"Semiconductor devices may be classified as memory devices or logic devices. Memory devices store data. Generally, semiconductor memory devices may be classified as volatile memory devices or nonvolatile memory devices. Volatile memory devices lose their stored data when the power supplied thereto is interrupted. Volatile memory devices include dynamic random access memory (DRAM) devices, and static random access memory (SRAM) devices. On the other hand, nonvolatile memory devices retain their stored data even when the power supplied thereto is interrupted. Nonvolatile memory devices include programmable read only memory (PROM) devices, erasable PROMs, electrically erasable PROMs (EPROMs), and flash memory devices.
"Also, next generation semiconductor memory devices such as ferroelectric RAMs (FRAMs), magnetic RAMs (MRAMs), and phase change RAMs (PRAM), are being developed to offer higher performance while consuming lower amounts of power. Characteristically, materials constituting those next generation semiconductor memory devices have different resistance values depending on the values of the current and voltage supplied thereto, and maintain their resistance values even when the current or voltage supply is interrupted."
In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventor's summary information for this patent: "According to one aspect of the inventive concept, there is provided a method of manufacturing a variable resistance memory device which includes forming conductive patterns on a substrate, forming sacrificial patterns which expose a portion only of the top surface of each of the conductive patterns, etching the conductive patterns using the sacrificial patterns as an etching mask to remove part of the upper portion of each of the conductive patterns and thereby form lower electrodes, forming mold patterns on the lower electrodes and which cover sidewalls of the sacrificial patterns, and replacing the sacrificial patterns with patterns having variable resistance.
"According to another aspect of the inventive concept, there is provided a variable resistance memory device, comprising: a substrate, lower electrodes disposed on the substrate, patterns having variable resistance disposed on the lower electrodes and in contact therewith, and upper electrodes disposed on the variable resistance patterns, and in which each of the lower electrodes has at least first and second upwardly facing surfaces located at different heights in the device, and sidewall surfaces terminating at the first upwardly facing surface, in which the first upwardly facing surface of each of the lower electrodes is the top surface of the lower electrode and contacts the variable resistance pattern disposed thereon, and in which at least one of the sidewall surfaces of each of the lower electrodes is aligned with a sidewall surface of the variable resistance pattern disposed thereon.
"According to still another aspect of the inventive concept, there is provided a method of manufacturing a variable resistance memory device, which includes forming preliminary conductive patterns on a substrate, removing only one part of an upper portion of each of the preliminary conductive patterns and leaving another part of the upper portion of each of the preliminary conductive patterns to thereby form lower electrodes, and forming patterns of material, whose resistance varies depending on temperature, on and in contact with top surfaces of the lower electrodes."
For more information, see this patent: Kim,
Keywords for this news article include: Semiconductor, Random Access Memory,
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