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The following quote was obtained by the news editors from the background information supplied by the inventors: "Solid-state image sensors are used in, for example, video cameras, and are presently realized in a number of forms including charge coupled devices (CCDs) and CMOS image sensors. These image sensors are based on a two dimensional array of pixels. Each pixel includes a sensing element that is capable of converting a portion of an optical image into an electronic signal. These electronic signals are then used to regenerate the optical image on, for example, a liquid crystal display (LCD).
"More recently, however, CMOS image sensors have gained in popularity. Pure CMOS image sensors have benefited from advances in CMOS technology for microprocessors and ASICs and provide several advantages over CCD imagers. Shrinking lithography, coupled with advanced signal-processing algorithms, sets the stage for sensor array, array control, and image processing on one chip produced using these well-established CMOS techniques. Shrinking lithography should also decrease image-array cost due to smaller pixels. However, pixels cannot shrink too much, or they have an insufficient light-sensitive area. Nonetheless, shrinking lithography provides reduced metal-line widths that connect transistors and buses in the array.
"Many image sensors utilize an electronic global shutter (GS) in which an image is captured by all of the pixels simultaneously (i.e., the integration of photo-electrons in the photodiode starts and stops at the same time for all pixels), and then the captured image is read out of the pixels, typically using a rolling shutter (RS) operation. Conventional CMOS image sensors that support GS operations include a Memory Node (MN) in each pixel that stores the image information (captured charge) until it is read out. That is, the image information (captured charge) generated in the photodiode of each pixel is transferred to and temporarily stored in the MN of each pixel, and then the captured charges are systematically (e.g., row by row) read out of the MN of each pixel (e.g., one row of pixels at a time) during the RS operation.
"One possible way to reduce readout noise in global shutter pixel is to have an additional floating diffusion (FD) for each pixel, and reading out the captured charge using a correlated double sampling (CDS) readout operation. The CDS readout operation is perform by first resetting the FD and reading the reset (typically referred to as a sample-and-hold reset (SHR) signal value), and then transferring the captured charge from the pixel's MN to the pixel's FD and reading the image bit value (typically referred to as a sample-and-hold image (SHS) signal value). The CDS readout approach cancels out the kt/c associated with reset operations, which is otherwise dominant in low light. This noise reduction approach sets more strict design demands on the MN. Since the MN needs to optimized in a way that all the stored charge is transferred to the FD. The result of incomplete charge transfer is low light non-linearity and image lag.
"There is an ongoing trend\demand to increase sensor resolution or to decrease pixel size. Decreasing the size of a global shutter pixel capable of CDS is impossible without compromising the active fill factor of the pixel due to the additional floating diffusion in each pixel and the associated control lines (typically four lines per row of pixels) that are required to support both GS image capture and rolling shutter CDS readout operations.
"What is needed is an image sensor that supports GS image capture, utilizes low noise CDS readout operations, and facilitates higher resolution than that of conventional approaches by eliminating the need for disposing a floating diffusion in each pixel, and by reducing the number of control signals per pixel to less than four."
In addition to the background information obtained for this patent application, VerticalNews journalists also obtained the inventors' summary information for this patent application: "The present invention is directed to a novel method for operating a CMOS global shutter (GS) image sensor in which charges generated on the photodiode (referred to as a 'captured charge') of each pixel during a GS image capture operation are sequentially read out as using shared floating diffusions during a rolling shutter (RS) readout operation. That is, each pixel of an associated pixel group includes a charge coupled gate (CCG) device (or other memory node) for storing the captured charge generated by that pixel's photodiode during the GS image capture operation, and the CCG devices of the group's pixels are operably coupled to the shared floating diffusion. During a first phase of the RS readout operation, a first captured charge, which was generated and stored in a first pixel in the pixel group during the GS image capture operation, is transferred from the first pixel to the shared floating diffusion, and a first CDS readout value is generated on an associated output signal line having a signal value reflecting the 'size' of the first captured charge. Subsequently, during a second phase of the RS readout operation, a second captured charge, which was generated and stored in a second pixel in the pixel group during the GS image capture operation, is transferred to the shared floating diffusion, and a second CDS readout value is generated on an associated output signal line having a signal value reflecting the 'size' of the second captured charge. By providing CCG devices that temporarily store a captured charge in each pixel and utilizing shared floating diffusions during the RS readout operation to sequentially read out the captured charges stored in multiple associated pixels, the present invention facilitates both GS image capture operations and low noise CDS readout operations, and also facilitates the production of GS image sensors having pixels with increased active fill factor by eliminating the need for a floating diffusion in each pixel (i.e., by reducing the area taken up by control circuitry in each pixel).
"The GS image capture operation includes simultaneously generating a captured charge on every pixel during an integration phase in response to global control signals, and then transferring the captured charges to each pixel's CCG device during a transfer phase in response to global control signals. The integration phase involves coupling each photodiode to a voltage source during a pre-integration period, and then de-coupling the photodiodes of each of the plurality of pixels from the voltage source and electrically isolating said photodiode of each of the plurality of pixels during an integration period. In a specific embodiment, each CCG device is a three-phase charge transfer shift register circuit (i.e., similar to those used in charge coupled device (CCD) type image sensors) including three charge storage regions respectively controlled by three phase gates such that the storage of a captured charge in the charge storage regions is controlled by an associated phase gate. The transfer phase involves activating a transfer gate connected between the photodiode and a first charge storage region in the CCG device of each pixel, and activating a first phase gate of the CCG device in each pixels. Next, a second phase gate of the CCG device in each pixel is activated and the transfer gate in each pixel is de-activated. Finally, the first phase gate in each pixel is de-activated to store the captured charges in the charge trapping region associated with said second phase gate. In accordance with a specific embodiment, the control signal applied to the second phase gate is then reduced (e.g., by 50% or more) in pixel groups whose readout is delayed by several tens of microseconds (e.g., the lowermost pixel groups in a large array that is read out in a top-to-bottom pattern). According to an embodiment of the present invention, the CCG devices in the pixels of each pixel group are controlled by a small number of shared control lines, where corresponding phase gates of the CCG devices in each pixel are controlled by the same shared control line (e.g., the first phase gate of each CCG device, which is connected to the transfer gate in each pixel, is connected to a first shared phase control signal line). By controlling the CCG devices in all pixels of each pixel group using shared control signals, the number of control lines disposed between each row of pixels can be reduced to fewer than the four control lines that are required in conventional devices supporting both GS capture and CDS readout, thereby further enhancing the active fill factor of each pixel in improving the image sensor's efficiency to collect light.
"According to a specific embodiment of the present invention, the multi-phase CCG devices of each pixel group are connected in series and controlled by shared phase control signals such that captured charges are shifted along the chain of CCG devices to the floating diffusion during the RS readout operation. That is, the end charge storage regions in each CCG device of a pixel group are connected and electrically coupled either to a first charge storage region in an adjacent CCG device or, in the case of the end (last) CCG device disposed in the last pixel of the chain, to the floating diffusion in a way that facilitates charge transfer from one CCG device to an associated adjacent CCG device (or the floating diffusion, in the case of the end CCG device). This chained CCG device arrangement facilitates both GS capture and RS readout operations that are controlled by minimal number of phase control signal lines (e.g., three phase control signal lines in the case of three-phase CCG devices), thereby further improving the image sensor's efficiency to collect light by minimizing the number of control lines per row of pixel groups.
BRIEF DESCRIPTION OF THE DRAWINGS
"These and other features, aspects and advantages of the present invention will become better understood with regard to the following description, appended claims, and accompanying drawings, where:
"FIG. 1 is a simplified circuit diagram showing a pixel group of an image sensor according to an embodiment of the present invention;
"FIGS. 2A, 2B, and 2C are top, cross-sectional front elevation and cross-sectional side elevation views showing an exemplary CCG device utilized in each pixel of the image sensor of FIG. 1;
"FIG. 3 is a simplified block diagram showing the image sensor of FIG. 1 in additional detail;
"FIG. 4 is a flow diagram showing a generalized method for operating the image sensor of FIG. 1 according to an aspect of the present invention;
"FIGS. 5A, 5B, 5C, 5D, 5E, 5F, 5G, 5H and 5I are timing diagrams showing control signals utilized during integration, transfer and readout operations of the pixel group of FIG. 1;
"FIGS. 6A and 6B are simplified circuit diagrams showing signal values and operating states applied to the pixel group of FIG. 1 during an integration phase of a global shutter image capture operation according to an exemplary embodiment of the present invention;
"FIGS. 7A and 7B are simplified circuit diagrams showing signal values and operating states applied to the pixel group of FIG. 1 during a charge transfer phase of a global shutter image capture operation according to the exemplary embodiment of the present invention;
"FIGS. 8A, 8B, 8C and 8D are simplified circuit diagrams showing signal values and operating states of the pixel group of FIG. 1 during a first CDS readout phase of a rolling shutter readout operation according to the exemplary embodiment of the present invention;
"FIGS. 9A, 9B, 9C and 9D are simplified circuit diagrams showing signal values and operating states of the pixel group of FIG. 1 during a second CDS readout phase of a rolling shutter readout operation according to the exemplary embodiment of the present invention;
"FIGS. 10A, 10B, 10C and 10D are simplified circuit diagrams showing signal values and operating states of the pixel group of FIG. 1 during a third CDS readout phase of a rolling shutter readout operation according to the exemplary embodiment of the present invention;
"FIGS. 11A, 11B, 11C and 11D are simplified circuit diagrams showing signal values and operating states of the pixel group of FIG. 1 during a fourth CDS readout phase of a rolling shutter readout operation according to the exemplary embodiment of the present invention; and
"FIG. 12 is a simplified block-level diagram showing an exemplary layout pattern utilized to fabricate the pixel group of FIG. 1 according to a specific embodiment of the present invention."
URL and more information on this patent application, see: Lahav, Assaf; Fenigstein, Amos. Shared Readout Low Noise Global Shutter Image Sensor Method. Filed
Keywords for this news article include: Electronics,
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