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"Memory System and Method of Driving Memory System Using Zone Voltages" in Patent Application Approval Process

September 3, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- A patent application by the inventors NAM, SANG-WAN (HWASEONG-SI, KR); KIM, MINSU (HWASEONG-SI, KR); LEE, KANG-BIN (SEONGNAM-SI, KR); PARK, KITAE (SEONGNAM-SI, KR), filed on October 17, 2013, was made available online on August 21, 2014, according to news reporting originating from Washington, D.C., by VerticalNews correspondents.

This patent application has not been assigned to a company or institution.

The following quote was obtained by the news editors from the background information supplied by the inventors: "Embodiments of the inventive concepts described herein relate to a memory system and a driving method thereof.

"Semiconductor memory devices may be volatile or nonvolatile memory devices. A nonvolatile semiconductor memory device may retain data stored therein even when powered off. The nonvolatile memory device may be permanent or reprogrammable, depending upon the fabrication technology used. The nonvolatile memory device may be used for user data, program, and microcode storage in a wide variety of applications in the computer, avionics, telecommunications, and consumer electronics industries, for example."

In addition to the background information obtained for this patent application, VerticalNews journalists also obtained the inventors' summary information for this patent application: "One aspect of embodiments of the inventive concept provides a method for driving a nonvolatile memory device, including multiple strings, where each string is formed by penetrating plate-shaped word lines stacked on a substrate. The method includes configuring the word lines of a string in multiple zones based on zone configuration information, and applying zone voltages to the zones, respectively. The zone configuration information is varied according to a mode of operation.

"The zone configuration information may be generated in the nonvolatile memory device. Alternatively, the zone configuration information may be provided from an external device.

"The method may further include determining whether the zone configuration is required.

"The mode of operation may include one of a program mode, a read mode or an erase mode. The zone configuration information during the program mode may be the same as the zone configuration information during the read mode, and the zone configuration information during the read and program modes may be different from the zone configuration information during the erase mode.

"The method may further include applying a selection voltage to a selected word line during a read operation or a program operation. Unselected word lines may be configured into the zones, and applying zone voltages to the zones may include applying the zone voltages to the configured zones of the unselected word lines.

"The method may further include generating the selection voltage, and generating the zone voltages.

"The method may further include applying an erase voltage to the substrate during an erase operation, while applying the zone voltages to the configured zones. The method may further include changing the zone configuration information when erase speeds of memory cells corresponding to the zones are different.

"Configuring the word lines to the zones based on zone configuration information may include selecting one of the word lines to which one of the zone voltages is to be applied, based on the zone configuration information.

"Another aspect of embodiments of the inventive concept provides a memory system including a nonvolatile memory device and a memory controller. The nonvolatile memory device has multiple memory blocks, each memory block having multiple strings formed by penetrating plate-shaped word lines stacked on a substrate. The memory controller is configured to control the nonvolatile memory device. The nonvolatile memory device further includes a zone controller configured to control configuration of the word lines to a plurality of zones based on zone configuration information, and multiple zone voltage generators configured to generate zone voltages corresponding to the zones. The zone configuration information is varied according to a mode of operation of the nonvolatile memory device.

"The nonvolatile memory device may further include an address decoder configured to select one of the memory blocks based on an input address and to provide the zone voltages to corresponding zones based on the zone configuration information for the selected memory block.

"The nonvolatile memory device may further include a selection voltage generator configured to generate a selection voltage to be applied to a selected one of the word lines during a program operation or a read operation.

"The memory controller may be configured to determine whether a change of the zone configuration information is required, and to send new zone configuration information to the nonvolatile memory device based on the determination result.

"Another aspect of embodiments of the inventive concept provides a nonvolatile memory device, including a memory cell array, a voltage generating circuit and an address decoder. The memory cell array includes a memory block having multiple strings and multiple word lines, where the strings include corresponding pillars, and memory cells are formed at intersections of the pillars and the word lines, respectively. The voltage generating circuit is configured to generate a selection voltage and multiple zone voltages, the selection voltage being applied to a selected word line of the word lines in the memory block during a program operation or a read operation, and the zone voltages being applied to multiple zones, each zone including at least one unselected word line. The address decoder is configured to transfer the selection voltage to the selected word line and the zone voltages to the zones of the unselected word lines, respectively.

"The nonvolatile memory device may further include control logic configured to determine the zones and to control application of the selection voltage and the plurality of zone voltages. The address decoder may be further configured to decide whether to apply the selection voltage or one of the zone voltages based on an address and a zone voltage selection signal received from the control logic.

"The zone voltages provide optimal program pass voltages or optimal read pass voltages corresponding to the zones during the program or read operations, respectively.

"The voltage generating circuit may be further configured to generate an erase voltage, the erase voltage being applied to a substrate of the memory block and other zone voltages being applied to other zones during an erase operation.

BRIEF DESCRIPTION OF THE FIGURES

"The above and other objects and features will become apparent from the following description with reference to the following figures, wherein like reference numerals refer to like parts throughout the various figures unless otherwise specified, and wherein:

"FIG. 1 is a block diagram schematically illustrating a nonvolatile memory device, according to an embodiment of the inventive concept;

"FIG. 2 is a perspective view of a memory block of FIG. 1, according to an embodiment of the inventive concept;

"FIG. 3 is a cross-sectional view of a pillar, according to an embodiment of the inventive concept;

"FIG. 4 is a diagram schematically illustrating zone organization during a program operation or a read operation of a nonvolatile memory device of FIG. 1, according to an embodiment of the inventive concept;

"FIG. 5 is a diagram schematically illustrating zone organization during an erase operation of a nonvolatile memory device of FIG. 1, according to an embodiment of the inventive concept;

"FIG. 6 is a flow chart schematically illustrating a method of driving a nonvolatile memory device, according to an embodiment of the inventive concept;

"FIG. 7 is a flow chart schematically illustrating a method of erasing a nonvolatile memory device, according to an embodiment of the inventive concept;

"FIG. 8 is a block diagram schematically illustrating a memory system, according to an embodiment of the inventive concept;

"FIG. 9 is a block diagram schematically illustrating a solid state drive, according to an embodiment of the inventive concept;

"FIG. 10 is a block diagram schematically illustrating an eMMC, according to an embodiment of the inventive concept; and

"FIG. 11 is a block diagram schematically illustrating a UFS system, according to an embodiment of the inventive concept."

URL and more information on this patent application, see: NAM, SANG-WAN; KIM, MINSU; LEE, KANG-BIN; PARK, KITAE. Memory System and Method of Driving Memory System Using Zone Voltages. Filed October 17, 2013 and posted August 21, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=3711&p=75&f=G&l=50&d=PG01&S1=20140814.PD.&OS=PD/20140814&RS=PD/20140814

Keywords for this news article include: Patents, Electronics, Semiconductor.

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Source: Electronics Newsweekly


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