News Column

"System and Method for Slave-Based Memory Protection" in Patent Application Approval Process

August 30, 2014



By a News Reporter-Staff News Editor at Journal of Transportation -- A patent application by the inventors Chavali, Balatripura Sodemma (Sugar Land, TX); Greb, Karl Fredrich (Sugarland, TX); Suvarna, Rajeev (Bangalore, IN), filed on August 30, 2013, was made available online on August 14, 2014, according to news reporting originating from Washington, D.C., by VerticalNews correspondents.

This patent application is assigned to Texas Instruments Incorporated.

The following quote was obtained by the news editors from the background information supplied by the inventors: "Various processes are governed by international standards relating to safety and risk reduction. For example, IEC 61508 addresses functional safety of electrical, electronic, and programmable electronic devices, such as microcontrollers or other computers used to control industrial or other safety critical processes. IEC 61508 defines Safety Integrity Levels (SIL) based on a probabilistic analysis of a particular application. To achieve a given SIL, the application, including constituent components, must meet targets for the maximum probability of 'dangerous failure' and a minimum 'safe failure fraction.' The concept of 'dangerous failure' is defined on an application-specific basis, but is based on requirement constraints that are verified for their integrity during the development of the safety critical application. The 'safe failure fraction' determines capability of the system to manage dangerous failures and compares the likelihood of safe and detected failures with the likelihood of dangerous, undetected failures. Ultimately, an electronic device's certification to a particular SIL requires that the electronic device provide a certain level of detection of and resilience to failures as well as enable the safety critical application to transition to a safe state after a failure.

"Another functional safety standard is ISO 26262, which addresses the functional safety of road vehicles such as automobiles. ISO 26262 aims to address possible hazards caused by malfunctioning behavior of automotive electronic and electrical systems. Similar to SILs defined by IEC 61508, ISO 26262 provides an automotive-specific risk-based approach to determine risk classes referred to as Automotive Safety Integrity Levels (ASIL). ASILs are used to specify a particular product's ability to achieve acceptable safety goals.

"An electronic device that controls a process--industrial, automotive, or otherwise--may be used to perform multiple functions, some of which are 'safety functions' while others are 'non-safety functions.' A safety function is a function whose operation impacts the safety of the process; for example, a closed-loop control system that drives an electric motor used for power steering is a safety function. A non-safety function is a function whose operation does not impact the safety of the process; for example, debug functionality built into the electronic device that is used to develop software for the control functions, but is not used when the electronic device is integrated into a vehicle, is a non-safety function."

In addition to the background information obtained for this patent application, VerticalNews journalists also obtained the inventors' summary information for this patent application: "The problems noted above are solved in large part by a system including a bus slave coupled to a plurality of bus masters via one or more interconnects. The system also includes a memory protection unit (MPU) associated with the bus slave, the MPU having a set of access permissions that grants access to the bus slave from a first bus master and denies access to the bus slave from a second bus master. The MPU generates an error response as result of a transaction generated by a task on the second bus master attempting to access the bus slave.

"Other embodiments of the present disclosure are directed to a method including receiving a transaction from a bus master directed at a bus slave, determining whether to grant or deny the transaction access to the bus slave, and generating an error response as a result of determining to deny access to the transaction.

"Still other embodiments of the present disclosure are directed to an electronic device including a bus slave that is memory or a peripheral and first and second bus masters to execute one or more tasks. Each task generates transactions directed at the bus slave. The device also includes an interconnect to couple the bus slave to the bus master and a memory protection unit (MPU) associated with the bus slave. The MPU has a set of access permissions that grants access to the bus slave from the first bus master and denies access to the bus slave from the second bus master. The MPU generates an error response as result of a transaction generated by a task on the second bus master attempting to access the bus slave.

BRIEF DESCRIPTION OF THE DRAWINGS

"For a detailed description of exemplary embodiments of the invention, reference will now be made to the accompanying drawings in which:

"FIG. 1 shows a block diagram of an exemplary system on a chip (SOC) architecture in accordance with various embodiments;

"FIG. 2 shows a block diagram of an exemplary memory protection unit (MPU) in conjunction with a multiple-task bus master in accordance with various embodiments;

"FIG. 3 shows a block diagram of an exemplary MPU in conjunction with a single-task bus master in accordance with various embodiments;

"FIG. 4 shows a block diagram of an exemplary direct memory access (DMA) controller in conjunction with a multiple-task bus master in accordance with various embodiments;

"FIG. 5 shows a block diagram of an exemplary MPU in conjunction with a multiple-task bus master with a virtualized hardware scheme in accordance with various embodiments;

"FIG. 6 shows a block diagram of multiple exemplary MPUs for slave-based memory protection in accordance with various embodiments; and

"FIG. 7 shows a flow chart of a method in accordance with various embodiments."

URL and more information on this patent application, see: Chavali, Balatripura Sodemma; Greb, Karl Fredrich; Suvarna, Rajeev. System and Method for Slave-Based Memory Protection. Filed August 30, 2013 and posted August 14, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=576&p=12&f=G&l=50&d=PG01&S1=20140807.PD.&OS=PD/20140807&RS=PD/20140807

Keywords for this news article include: Automobiles, Transportation, Texas Instruments Incorporated.

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Source: Journal of Transportation


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