The patent's assignee is
News editors obtained the following quote from the background information supplied by the inventors: "Semiconductor devices are commonly found in modern electronic products. Semiconductor devices vary in the number and density of electrical components. Discrete semiconductor devices generally contain one type of electrical component, e.g., light emitting diode (LED), small signal transistor, resistor, capacitor, inductor, and power metal oxide semiconductor field effect transistor (MOSFET). Integrated semiconductor devices typically contain hundreds to millions of electrical components. Examples of integrated semiconductor devices include microcontrollers, microprocessors, charged-coupled devices (CCDs), solar cells, and digital micro-mirror devices (DMDs).
"Semiconductor devices perform a wide range of functions such as high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, transforming sunlight to electricity, and creating visual projections for television displays. Semiconductor devices are found in the fields of entertainment, communications, power conversion, networks, computers, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment.
"Semiconductor devices exploit the electrical properties of semiconductor materials. The atomic structure of semiconductor material allows its electrical conductivity to be manipulated by the application of an electric field or through the process of doping. Doping introduces impurities into the semiconductor material to manipulate and control the conductivity of the semiconductor device.
"A semiconductor device contains active and passive electrical structures. Active structures, including bipolar and field effect transistors, control the flow of electrical current. By varying levels of doping and application of an electric field or base current, the transistor either promotes or restricts the flow of electrical current. Passive structures, including resistors, capacitors, and inductors, create a relationship between voltage and current necessary to perform a variety of electrical functions. The passive and active structures are electrically connected to form circuits, which enable the semiconductor device to perform high-speed calculations and other useful functions.
"Semiconductor devices are generally manufactured using two complex manufacturing processes, i.e., front-end manufacturing, and back-end manufacturing, each involving potentially hundreds of steps. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each die is typically identical and contains circuits formed by electrically connecting active and passive components. Back-end manufacturing involves singulating individual die from the finished wafer and packaging the die to provide structural support and environmental isolation.
"One goal of semiconductor manufacturing is to produce smaller semiconductor devices. Smaller devices typically consume less power, have higher performance, and can be produced more efficiently. In addition, smaller semiconductor devices have a smaller footprint, which is desirable for smaller end products. A smaller die size may be achieved by improvements in the front-end process resulting in die with smaller, higher density active and passive components. Back-end processes may result in semiconductor device packages with a smaller footprint by improvements in electrical interconnection and packaging materials.
"The electrical interconnection between semiconductor packages can be accomplished with conductive through silicon vias (TSVs) or through hole vias (THVs). To form TSVs or THVs, a via is cut through the semiconductor material or peripheral region around each semiconductor die. The vias are filled with an electrically conductive material, for example, copper deposition through an electroplating process.
"The TSV and THV formation involves considerable time for the via filling due to its small area. The fully-filled TSV can produce high stress between vias leading to cracking and lower reliability. The equipment needed for electroplating, e.g., plating bath, and sidewall passivation increases manufacturing cost. In addition, voids may be formed within the vias, which causes defects and reduces reliability of the device. TSV and THV can be a slow and costly approach to make vertical electrical interconnections in semiconductor packages. These interconnect schemes also have problems with production yield, large package size, and process cost management."
As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "A need exists to efficiently and cost effectively form conductive vias to electrically interconnect stacked semiconductor die. Accordingly, in one embodiment, the present invention is a method of making a semiconductor device comprising the steps of providing a semiconductor die, forming a via in the semiconductor die, forming a trench along a length of a peripheral region of the semiconductor die, and depositing a first conductive layer in the trench and via.
"In another embodiment, the present invention is a method of making a semiconductor device comprising the steps of providing a semiconductor die, forming a via in the semiconductor die, forming a trench in a peripheral region of the semiconductor die, and depositing a first conductive layer in the via.
"In another embodiment, the present invention is a method of making a semiconductor device comprising the steps of providing a semiconductor die, forming a via in the semiconductor die, and forming a trench along a peripheral region of the semiconductor die.
"In another embodiment, the present invention is a semiconductor device comprising a semiconductor die. A trench including opposing sidewalls is formed along a peripheral region of the semiconductor die.
BRIEF DESCRIPTION OF THE DRAWINGS
"FIG. 1 illustrates a PCB with different types of packages mounted to its surface;
"FIGS. 2a-2c illustrate further detail of the representative semiconductor packages mounted to the PCB;
"FIGS. 3a-3j illustrate a process of forming conductive vias with partially filled trench in a peripheral region of the die;
"FIGS. 4a-4b illustrate the semiconductor device with conductive vias and RDL;
"FIG. 5 illustrates vertically stacked semiconductor die electrically connected with conductive vias and RDL;
"FIGS. 6a-6e illustrate a process of forming conductive vias by fully plating the trench;
"FIGS. 7a-7e illustrate another process of forming conductive vias with the partially filled trench in the peripheral region of the die; and
"FIG. 8 illustrates the semiconductor device with conductive vias and backside RDL."
For additional information on this patent application, see: Do,
Keywords for this news article include: Electronics, Semiconductor,
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