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Patent Issued for Semiconductor Device Having Oscillator Circuit

August 29, 2014



By a News Reporter-Staff News Editor at Health & Medicine Week -- From Alexandria, Virginia, NewsRx journalists report that a patent by the inventor Suzuki, Sanae (Kanagawa, JP), filed on September 15, 2012, was published online on August 12, 2014 (see also Renesas Electronics Corporation).

The patent's assignee for patent number 8803621 is Renesas Electronics Corporation (Kawasaki-shi, Kanagawa, JP).

News editors obtained the following quote from the background information supplied by the inventors: "Miniaturization proceeds in a mobile information terminal and a DSC (Digital Still Camera) and so on. With the miniaturization of the terminal, a battery is also miniaturized, and a case where a button cell of a small capacity is used is increasing. For this reason, a low consumed power amount is required even to an oscillation circuit which always operates inside the LSI (Large Scale Integration).

"As a method of supplying power to such an oscillation circuit, a conventional technique is known in which a power supply voltage from a constant voltage circuit is lowered to a constant voltage, and the lowered voltage is supplied to the oscillation circuit. However, in such a conventional technique, as the voltage lowering width is increased, a resistance element having a higher resistance value is required. When the resistance element has the higher resistance value, a wider area is required for the resistance element in the LSI.

"Therefore, the saving an occupation area in the LSI and the low consumed power amount are required.

"In conjunction with the above, an oscillation circuit is disclosed in Patent Literature 1 (JP 2005-159786A). This oscillation circuit has as an object, to reduce consumption current. This oscillation circuit is provided with a functional section which restrains a supply voltage to an oscillation gate. This oscillation circuit restrains a voltage by using a threshold voltage of a transistor in a diode connection.

"FIG. 1 is a circuit diagram showing the configuration of the oscillation circuit according to Patent Literature 1. Components of the oscillation circuit shown in FIG. 1 will be described. This oscillation circuit is provided with an oscillation gate circuit section 120, first and second amplitude restraining circuits 151 and 152, an amplitude amplifying circuit 109, an input side capacitor C101, an output side capacitor C102, a feedback resistance 103 and a resonator 104. The oscillation gate circuit section 120 is provided with a PMOS transistor 101 and an NMOS transistor 102. The first amplitude restraining circuit 151 is provided with a PMOS transistor 107. The first amplitude restraining circuit 151 is further provided with a diode 130, another PMOS transistor 132 and a first current source 134 and so on, but the description of these elements is omitted. The second amplitude restraining circuit 152 is provided with an NMOS transistor 108. The second amplitude restraining circuit 152 is further provided with a second diode 131, another NMOS transistor 133 and a second current source 135 and so on, but the description of these components is omitted. The amplitude amplifying circuit 109 is provided with a PMOS transistor 111 and an NMOS transistor 112.

"The connection relation of the components of the oscillation circuit shown in FIG. 1 will be described. A source of the PMOS transistor 107 is connected with a power supply VCC. A gate and drain of the PMOS transistor 107 are connected with the source of the PMOS transistor 101 in common. The gate of the PMOS transistor 101 is connected with the gate of the NMOS transistor 102, one of the ends of the feedback resistance 103, one of the ends of the resonator 104, and one of the ends of the input side capacitor C101 in common. The drain of the PMOS transistor 101 is connected with the drain of the NMOS transistor 102, the other end of the feedback resistance 103, the other end of the resonator 104, one of the ends of the output side capacitor C102, a gate of the PMOS transistor 111 and a gate of the NMOS transistor 112 in common. A source of the NMOS transistor 102 is connected with the gate and drain of the NMOS transistor 108 in common. The source of the NMOS transistor 108 is grounded. The other end of the input side capacitor C101 is grounded. The other end of the output side capacitor C102 is grounded. The source of the PMOS transistor 111 is connected with the power supply VCC. The drain of the PMOS transistor 111 is connected with the drain of the NMOS transistor 112 and an output section CKOUT in common. The source of the NMOS transistor 112 is grounded.

"An operation of the oscillation circuit shown in FIG. 1 will be described. In the first amplitude restraining circuit 151, the PMOS transistor 107 has the gate and the drain connected in the so-called 'diode connection'. Therefore, the voltage of the drain of the PMOS transistor 107 is equal to a voltage lowered by the threshold voltage of the PMOS transistor 107 from the power supply voltage VCC. Hereinafter, the threshold voltage of the PMOS transistor 107 is referred to as Vt107.

"In a same way, the NMOS transistor 108 is in a diode connection in the second amplitude restraining circuit 152. Therefore, the voltage of the drain of the NMOS transistor 108 is equal to a voltage arisen from the ground voltage by the threshold voltage of the NMOS transistor 108. Hereinafter, the threshold voltage of the NMOS transistor 108 is referred to as Vt108.

"In the oscillation gate circuit section 120, the PMOS transistor 101 and the NMOS transistor 102 are connected in serial between the drain of the PMOS transistor 107 of the first amplitude restraining circuit 151 and the drain of the NMOS transistor 108 of the second amplitude restraining circuit 152. Therefore, an oscillation signal generated by the oscillation gate circuit section 120 has the amplitude between the voltage lower by threshold voltage Vt107 than power supply voltage VCC and the voltage higher by the threshold voltage Vt108 than the ground voltage.

"Here, an output signal of the oscillation gate circuit section 120 is fed back to the input side through the feedback resistance 103 and the resonator 104 to be oscillated. It should be noted that when the oscillation signal of the oscillation gate circuit section 120 is generated, a charging operation and a discharging operation are performed in the input side capacitor C101 and the output side capacitor C102. The current which accompanies the charging/discharging operations is consumed in the oscillation circuit. In Patent Literature 1, the consumed power amount of the oscillation circuit is reduced by making the amplitude of the oscillation signal small."

As a supplement to the background information on this patent, NewsRx correspondents also obtained the inventor's summary information for this patent: "There is a problem that the operation of a transistor is influenced by a process deviation when the transistor is manufactured, in the oscillation circuit of Patent Literature 1. There are two kinds of process deviation.

"In a first kind, the process deviation occurs such that the threshold voltages of the PMOS transistor and the NMOS transistor become higher than design values. At this time, the amplitude of the oscillation signal generated by the oscillation gate circuit section 120 becomes larger than the design value. Also, the driving ability of the oscillation gate circuit section 120 becomes smaller than a design value. Therefore, in the first kind of process deviation, in the oscillation gate circuit section 120, it is desirable that the voltage between the source of the PMOS transistor 101 and the source of the NMOS transistor 102 is larger.

"Next, in a second kind, the process deviation occurs such that the threshold voltages of the PMOS transistor and the NMOS transistor become smaller than design values. At this time, the amplitude of the oscillation signal generated by the oscillation gate circuit section 120 becomes smaller than a design value. Also, the driving ability of the oscillation gate circuit section 120 becomes larger than a design value. Therefore, in the second kind of process deviation, in the oscillation gate circuit section 120, it is desirable that the voltage between the source of the PMOS transistor 101 and the source of the NMOS transistor 102 is smaller.

"However, in case of manufacturing a transistor, it is impossible to estimate the direction of the process deviation. Therefore, it is necessary to secure a sufficient margin at the design stage such that a voltage range in which the oscillation gate circuit section 120 can surely operate is secured even if the process deviation occurs in any direction. As a result, in the oscillation gate circuit section 120, the voltage range between the source of the PMOS transistor 101 and the source of the NMOS transistor 102 contains a margin which does not contribute to the reduction of the consumed power amount.

"Also, the threshold voltage of the MOS transistor in the diode connection is about 0.6V to 0.7V. In order to get the larger threshold voltage, it is required that the gate length L of the MOS transistor is made long and the drain-source current IDS which flows between the drain and the source is made small. However, the current IDS is proportional to a reciprocal of the gate length L. FIG. 5 is a graph showing the relation of gate length L and drain-source current IDS in general MOS transistor. In case of the oscillation circuit of Patent Literature 1, in order to get the current IDS which is sufficiently small, it would be necessary to increase the gate length L to tens of .mu.m (micrometers). To use the MOS transistor which has such a gate length L is one of causes that the area of the oscillation circuit becomes large. In this way, the oscillation circuit of Patent Literature 1 can not attain the reduction of a consumed power amount and the reduction of a manufacturing cost simultaneously.

"In an aspect of the embodiment, a semiconductor device includes: a first power supply section configured to supply a first power supply voltage; a second power supply section configured to supply a second power supply voltage; an amplitude control circuit section configured to receive the first and second power supply voltages and generate first and second supply voltages; and an oscillation circuit section configured to receive the first and second supply voltages from first and second input sections to carry out an oscillation. The amplitude control circuit section includes: a plurality of MOS transistors, which are connected in serial between the first and second power supply sections, and each of which is in a diode connection; a first output section connected with one of the plurality of MOS transistors to output the first supply voltage; and a second output section connected with another of the plurality of MOS transistors to output the second supply voltage.

"According to the semiconductor device of the present invention, by using a plurality of MOS transistors, each of which is in a diode connection and which are connected in serial, a voltage is generated to drive an oscillation circuit section. At this time, the voltage generated by the plurality of MOS transistors is obtained based on a power supply voltage and a ratio of the threshold voltages of the MOS transistors. Therefore, it is possible to restrain on the area of each MOS transistor, to reduce the threshold voltage of each MOS transistor, and to reduce a consumed power amount of the oscillation circuit section."

For additional information on this patent, see: Suzuki, Sanae. Semiconductor Device Having Oscillator Circuit. U.S. Patent Number 8803621, filed September 15, 2012, and published online on August 12, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8803621.PN.&OS=PN/8803621RS=PN/8803621

Keywords for this news article include: Semiconductor, Microtechnology, Renesas Electronics Corporation.

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Source: Health & Medicine Week


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