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Patent Issued for Inspection Method and Apparatus, Lithographic Apparatus, Lithographic Processing Cell and Device Manufacturing Method

August 27, 2014



By a News Reporter-Staff News Editor at Journal of Engineering -- According to news reporting originating from Alexandria, Virginia, by VerticalNews journalists, a patent by the inventors Osten, Wolfgang Max Adolf Bernhard (Stuttgart, DE); Frenner, Karsten (Leonberg, DE); Bilski, Bartosz Jan (Stuttgart, DE), filed on April 27, 2012, was published online on August 12, 2014.

The assignee for this patent, patent number 8804123, is ASML Netherlands B.V. (Veldhoven, NL).

Reporters obtained the following quote from the background information supplied by the inventors: "A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g., comprising part of, one, or several dies) on a substrate (e.g., a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned. Known lithographic apparatus include so-called steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion at one time, and so-called scanners, in which each target portion is irradiated by scanning the pattern through a radiation beam in a given direction (the 'scanning'-direction) while synchronously scanning the substrate parallel or anti-parallel to this direction. It is also possible to transfer the pattern from the patterning device to the substrate by imprinting the pattern onto the substrate.

"In order to monitor the lithographic process, parameters of the patterned substrate are measured. Parameters may include, for example, the overlay error between successive layers formed in or on the patterned substrate and critical linewidth of developed photosensitive resist. This measurement may be performed on a product substrate and/or on a dedicated metrology target. There are various techniques for making measurements of the microscopic structures formed in lithographic processes, including the use of scanning electron microscopes and various specialized tools. A fast and non-invasive form of specialized inspection tool is a scatterometer in which a beam of radiation is directed onto a target on the surface of the substrate and properties of the scattered or reflected beam are measured. By comparing the properties of the beam before and after it has been reflected or scattered by the substrate, the properties of the substrate can be determined. This can be done, for example, by comparing the reflected beam with data stored in a library of known measurements associated with known substrate properties. Two main types of scatterometer are known. Spectroscopic scatterometers direct a broadband radiation beam onto the substrate and measure the spectrum (intensity as a function of wavelength) of the radiation scattered into a particular narrow angular range. Angularly resolved scatterometers use a monochromatic radiation beam and measure the intensity of the scattered radiation as a function of angle.

"As the semiconductor industry still follows the Moore's Law the smallest feature-size, the so-called Critical Dimension (CD), of new-generation integrated circuits (ICs) is continuously shrinking Every next generation (so-called node) of lithography processes is facing even more difficult challenges than the previous one, an important example being so-called Line Edge Roughness (LER). For the nodes below 100 nm the edges of lithography-fabricated IC structures can no longer be assumed to be straight lines since their nanometer-scale variations become a non-negligible fraction of the overall structures' dimensions, rendering the edges 'rough'. The 3.sigma._RMS value of the variations is what is called the Line Edge Roughness. When two rough edges form e.g., a line, its width is also statistically varying, this being known as Line Width Roughness (LWR). The relation between the two is: .sigma..sub.LWR=SQRT(2)*.sigma..sub.LER

"The foregoing will mean LER, not LWR, when referring to roughness, although both concepts are equally applicable of course. It has been observed that LER has a significant impact on lithography-fabricated devices, in that the more substantial the LER the worse the IC's performance. Moreover, LER is unlikely to scale down at the same rate as the CD does. From these observations it follows that having a shrinking CD (as is the case in every next lithography-generation) and constant LER, the latter becomes a more and more significant fraction of the overall CD error budget. Therefore, the CD control throughout the lithography-process becomes essentially a LER control. Consequently, there is a growing need to be able to determine the LER with sufficient precision."

In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventors' summary information for this patent: "It is an object of the present invention to address one or more of the above issues

"It is desirable to provide a method of determining edge roughness.

"According to an aspect of the invention, there is provided a method of determining a parameter related to the edge roughness of an object comprising: reflecting at least one radiation beam off the object, observing a first optical response signature from a beam reflected from the object, or a component thereof, being polarized with an electrical vector in a first orientation relative to the object, observing a second optical response signature from a beam reflected from the object, or a component thereof, being polarized with an electrical vector in a second orientation relative to the object, and determining the parameter related to the edge roughness of the object from the first and second optical responses.

"Further features and advantages of the invention, as well as the structure and operation of various embodiments of the invention, are described in detail below with reference to the accompanying drawings. It is noted that the invention is not limited to the specific embodiments described herein. Such embodiments are presented herein for illustrative purposes only. Additional embodiments will be apparent to persons skilled in the relevant art(s) based on the teachings contained herein."

For more information, see this patent: Osten, Wolfgang Max Adolf Bernhard; Frenner, Karsten; Bilski, Bartosz Jan. Inspection Method and Apparatus, Lithographic Apparatus, Lithographic Processing Cell and Device Manufacturing Method. U.S. Patent Number 8804123, filed April 27, 2012, and published online on August 12, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8804123.PN.&OS=PN/8804123RS=PN/8804123

Keywords for this news article include: ASML Netherlands B.V.

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Source: Journal of Engineering


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