News Column

Patent Issued for Chip Type Laminated Capacitor

August 27, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- Samsung Electro-Mechanics Co., Ltd. (Gyunggi-Do, KR) has been issued patent number 8804304, according to news reporting originating out of Alexandria, Virginia, by VerticalNews editors.

The patent's inventors are Ahn, Young Ghyu (Gyunggi-do, KR); Lee, Byoung Hwa (Gyunggi-do, KR); Park, Min Cheol (Gyunggi-do, KR); Song, Young Hoon (Gyunggi-do, KR); Lee, Mi Hee (Gyunggi-do, KR).

This patent was filed on January 29, 2013 and was published online on August 12, 2014.

From the background information supplied by the inventors, news correspondents obtained the following quote: "The present invention relates to a chip type laminated capacitor capable of reducing acoustic noise generated between inner electrodes at the time power is applied thereto while being miniaturized and having high capacitance.

"With the trend toward small-sized and multi-functional electronics, the demand for a compact, high-capacitance chip type laminated capacitors embedded in electronics has also increased.

"In order to reduce the size of a chip type laminated capacitor and increase the capacitance thereof, there is a need to use a material having high dielectric permittivity, for example, barium titanate, as a ceramic material forming a dielectric layer. When AC and DC voltages are applied to the chip type laminated capacitor including the dielectric layer made of a material having high dielectric permittivity, a piezoelectric phenomenon is generated between inner electrodes and vibrations are generated.

"These vibrations may be excessive in the case that the permittivity of the dielectric layer is high and the size of a chip is relatively large, based on the same capacitance. The vibrations are transferred from an outer electrode of the chip type laminated capacitor to a circuit board on which the chip type laminated capacitor is mounted. In this case, the circuit board is vibrated to generate resonance.

"That is, when the resonance generated by the vibrations of the circuit board is in a range of an audible frequency (20 to 20,000 Hz), the sound of the vibrations in the circuit board may give a person an unpleasant feeling, and here, the vibration sound is referred to as acoustic noise.

"Acoustic noise generated due to a piezoelectric phenomenon in a laminated ceramic capacitor using a ferroelectric material may cause serious defects in some electronic devices.

"Acoustic noise may be a factor in noise generation in electronic devices equipped with the laminated ceramic capacitor."

Supplementing the background information on this patent, VerticalNews reporters also obtained the inventors' summary information for this patent: "An aspect of the present invention provides a chip type laminated capacitor having reduced acoustic noise, even in a case a dielectric permittivity and a thickness of a dielectric layer has been significantly reduced.

"According to an embodiment of the present invention, there is provided a chip type laminated capacitor, including: a ceramic body including a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 .mu.m or less; first and second outer electrodes formed on both ends of the ceramic body in a length direction; first and second band parts formed to extend inwardly in the length direction on a length-width (L-W) plane of the ceramic body from the first and second outer electrodes, respectively, the first and second band parts having different lengths; and third and fourth band parts formed to extend inwardly in the length direction on a length-thickness (L-T) plane of the ceramic body from the first and second outer electrodes, respectively, third and fourth band parts having different lengths.

"Fifth and sixth band parts are formed on a surface of the ceramic body, opposed to one surface thereof in a lamination direction, the one surface having the first and second band parts formed thereon, seventh and eighth band parts are formed on a surface of the ceramic body, opposed to one surface thereof in a width direction, the one surface having the third and fourth band parts formed thereon, and the first to eighth band parts may satisfy at least one of the following conditions (1), (2), (3), and (4). 3%.ltoreq.BWave1/L.ltoreq.40% (1) 3%.ltoreq.BWave2/L.ltoreq.40% (2) 3%.ltoreq.BWave3/L.ltoreq.40% (3), and 3%.ltoreq.BWave4/L.ltoreq.40% (4)

"where BWave1 represents an average value of lengths A1 and A2 of the first and second band parts, BWave1=(A1+A2)/2, BWave2 represents an average value of lengths B1 and B2 of the third and fourth band parts, BWave2=(B1+B2)/2, BWave3 represents an average value of lengths C1 and C2 of the fifth and sixth band parts, BWave3=(C1+C2)/2, and BWave4 represents an average value of lengths D1 and D2 of the seventh and eighth band parts, BWave4=(D1+D2)/2, and

"A1 represents a length of the first band part, A2 represents a length of the second band part, B1 represents a length of the third band part, B2 represents a length of the fourth band part, C1 represents a length of the fifth band part, C2 represents a length of the sixth band part, D1 represents a length of the seventh band part, and D2 represents a length of the eighth band part.

"An absolute value of a difference between the lengths of the band parts on one surface of the ceramic body and the BWave1 to the BWave4 may satisfy at least one of the following conditions (5) to (8). 5%.ltoreq.|A1-A2|/BWave1.ltoreq.20% (5) 5%.ltoreq.|B1-B2|/BWave2.ltoreq.20% (6) 5%.ltoreq.|C1-C2|/BWave3.ltoreq.20% (7), and 5%.ltoreq.|D1-D2|/BWave4.ltoreq.20% (8)

"where A1 represents the length of the first band part, A2 represents the length of the second band part, B1 represents the length of the third band part, B2 represents the length of the fourth band part, C1 represents the length of the fifth band part, C2 represents the length of the sixth band part, D1 represents the length of the seventh band part, and D2 represents the length of the eighth band part, wherein C1.noteq.C2 and D1.noteq.D2.

"According to another embodiment of the present invention, there is provided a chip type laminated capacitor, including: first and second outer electrodes formed on both ends of a ceramic body in a length direction, the ceramic body having a hexahedral shape; and first to eighth band parts extending inwardly in the length direction of the ceramic body from the first and second outer electrodes, first to eighth band parts being formed to be opposed to each other on a first surface and a third surface in a length-width (L-W) plane and on a second surface and a fourth surface in a length-thickness (L-T) plane, respectively, wherein lengths of the band parts formed on at least one of the first surface to the fourth surface are different from each other, and a length of one band part on at least one of the first surface to the fourth surface is different from that of another band part having the same polarity as the one band part and being formed on another surface continued to a surface on which the one band part is formed.

"The first band part formed on the first surface and the third band part formed on the second surface may have different lengths.

"Lengths of the band parts having the same polarity and being formed on surfaces opposed to each other may be different from each other.

"Heights of the band parts opposed to each other on the same surface of the ceramic body may be different each other

"The dielectric layer may have a thickness of 3 .mu.m or less and may be equal to 10 or more times an average particle diameter of a grain within the dielectric layer.

"The first to eighth band parts may satisfy at least one of the following conditions (1), (2), (3), and (4). 3%.ltoreq.BWave1/L.ltoreq.40% (1) 3%.ltoreq.BWave2/L.ltoreq.40% (2) 3%.ltoreq.BWave3/L.ltoreq.40% (3), and 3%.ltoreq.BWave4/L.ltoreq.40% (4)

"where BWave1 represents an average value of lengths of the first and second band parts, BWave1=(A1+A2)/2, BWave2 represents an average value of lengths of the third and fourth band parts, BWave2=(B1+B2)/2, BWave3 represents an average value of lengths of the fifth and sixth band parts, BWave3=(C1+C2)/2, and BWave4 represents an average value of lengths of the seventh and eighth band parts, BWave4=(D1+D2)/2, and

"A1 represents a length of the first band part, A2 represents a length of the second band part, B1 represents a length of the third band part, B2 represents a length of the fourth band part, C1 represents a length of the fifth band part, C2 represents a length of the sixth band part, D1 represents a length of the seventh band part, and D2 represents a length of the eighth band part.

"An absolute value of a difference between the lengths of the band parts on one surface of the ceramic body and the BWave1 to the BWave4 may satisfy at least one of the following conditions (5) to (8). 5%.ltoreq.|A1-A2|/BWave1.ltoreq.20% (5) 5%.ltoreq.|B1-B2|/BWave2.ltoreq.20% (6) 5%.ltoreq.|C1-C2|/BWave3.ltoreq.20% (7), and 5%.ltoreq.|D1-D2|/BWave4.ltoreq.20% (8)

"where A1 represents the length of the first band part, A2 represents the length of the second band part, B1 represents the length of the third band part, B2 represents the length of the fourth band part, C1 represents the length of the fifth band part, C2 represents the length of the sixth band part, D1 represents the length of the seventh band part, and D2 represents the length of the eighth band part, wherein C1.noteq.C2 and D1.noteq.D2.

"According to another embodiment of the present invention, there is provided a chip type laminated capacitor, including: a ceramic body including first and second inner electrodes, having a dielectric layer having a thickness of 3 .mu.m or less disposed therebetween; a first outer electrode formed on one end of the ceramic body in a length direction and connected to the first inner electrode, the first outer electrode including: a first band part formed on a first surface of the ceramic body; a third band part formed on a second surface of the ceramic body; a fifth band part formed on a third surface of the ceramic body opposed to the first surface thereof; and a seventh band part formed on a fourth surface of the ceramic body opposed to the second surface thereof; and a second outer electrode formed on another end of the ceramic body in the length direction and connected to the second inner electrode, the second outer electrode including: a second band part formed on the first surface of the ceramic body; a fourth band part formed on the second surface of the ceramic body; a sixth band part formed on the third surface of the ceramic body; and an eighth band part formed on the fourth surface of the ceramic body, wherein the number of grains disposed between the first and second inner electrodes is 10 or more in a thickness direction of the dielectric layer, lengths of the band parts formed on at least one of the first surface to the fourth surface are different from each other, and the first to eighth band parts satisfy at least one of the following conditions (1), (2), (3), and (4). 3%.ltoreq.BWave1/L.ltoreq.40% (1) 3%.ltoreq.BWave2/L.ltoreq.40% (2) 3%.ltoreq.BWave3/L.ltoreq.40% (3), and 3%.ltoreq.BWave4/L.ltoreq.40% (4)

"where BWave1 represents an average value of length of the first and second band parts, BWave1=(A1+A2)/2, BWave2 represents an average value of length of the third and fourth band parts, BWave2=(B1+B2)/2, BWave3 represents an average value of length of the fifth and sixth band parts, BWave3=(C1+C2)/2, and BWave4 represents an average value of length of the seventh and eighth band parts, BWave4=(D1+D2)/2.

"An absolute value of a difference between the lengths of the band parts on one surface of the ceramic body and the BWave1 to the BWave4 may satisfy at least one of the following conditions (5) to (8). 5%.ltoreq.|A1-A2|/BWave1.ltoreq.20% (5) 5%.ltoreq.|B1-B2|/BWave2.ltoreq.20% (6) 5%.ltoreq.|C1-C2|/BWave3.ltoreq.20% (7), and 5%.ltoreq.|D1-D2|/BWave4.ltoreq.20% (8)

"A1 represents a length of the first band part, A2 represents a length of the second band part, B1 represents a length of the third band part, B2 represents a length of the fourth band part, C1 represents a length of the fifth band part, C2 represents a length of the sixth band part, D1 represents a length of the seventh band part, and D2 represents a length of the eighth band part."

For the URL and additional information on this patent, see: Ahn, Young Ghyu; Lee, Byoung Hwa; Park, Min Cheol; Song, Young Hoon; Lee, Mi Hee. Chip Type Laminated Capacitor. U.S. Patent Number 8804304, filed January 29, 2013, and published online on August 12, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8804304.PN.&OS=PN/8804304RS=PN/8804304

Keywords for this news article include: Electronics, Circuit Board, Samsung Electro-Mechanics Co. Ltd.

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Source: Electronics Newsweekly


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