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Researchers Submit Patent Application, "Reverse Blocking Semiconductor Device, Semiconductor Device with Local Emitter Efficiency Modification and...

August 20, 2014



Researchers Submit Patent Application, "Reverse Blocking Semiconductor Device, Semiconductor Device with Local Emitter Efficiency Modification and Method of Manufacturing a Reverse Blocking Semiconductor Device", for Approval

By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Washington, D.C., VerticalNews journalists report that a patent application by the inventors Laven, Johannes Georg (Taufkirchen, DE); Baburske, Roman (Otterfing, DE); Jaeger, Christian (Munich, DE); Schulze, Hans-Joachim (Taufkirchen, DE), filed on January 31, 2013, was made available online on August 7, 2014.

No assignee for this patent application has been made.

News editors obtained the following quote from the background information supplied by the inventors: "While RC-IGBTs (reverse conducting insulated gate bipolar transistors), which monolithically integrate a free-wheeling diode that is conductive when the RC-IGBT is reverse biased, are typically used in motor control units, other applications, e.g. power converters, require switches that block the voltage in both directions. Such non reverse conducting or reverse blocking IGBTs are able to withstand a short circuit current for several microseconds. It is desirable to provide IGBTs and other semiconductor devices with enhanced short circuit strength."

As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "According to an embodiment, a reverse blocking semiconductor device includes a base region of a first conductivity type and a body region of a second, complementary conductivity type, wherein the base and body regions form a pn junction. Between the base region and a collector electrode an emitter layer includes emitter zones of the second conductivity type and at least one channel of the first conductivity type. The channel extends through the emitter layer between the base region and the collector electrode.

"According to another embodiment, a semiconductor device includes a base region of a first conductivity type and a body region of a second, complementary conductivity type, wherein the base and body regions form a pn junction. Between the base region and a collector electrode an emitter layer includes emitter zones of the second conductivity type and at least one channel of the first conductivity type. The channel extends through the emitter layer between the base region and the collector electrode and forms a Schottky contact with the collector electrode.

"According to another embodiment, a semiconductor device includes a base region of a first conductivity type and a body region of a second, complementary conductivity type, wherein the base and body regions form a pn junction. Between the base region and a collector electrode an emitter layer includes emitter zones of the second conductivity type and channels of the first conductivity type. The channels extend through the emitter layer between the base region and the collector electrode. A channel population density in a first section of the emitter layer is lower than in a second section.

"Another embodiment refers to a method of manufacturing a reverse blocking semiconductor device. Impurities of a first conductivity type are introduced into a semiconductor substrate of the first conductivity type through a process surface to obtain a process layer extending into the semiconductor substrate up to a first depth. Through openings of an impurity mask provided on the process surface impurities of a second, complementary conductivity type are introduced into the semiconductor substrate to obtain emitter zones extending into the semiconductor substrate up to a second depth greater than the first depth and channels of the first conductivity type between the emitter zones. Exposed portions of the process layer above the emitter zones are removed.

"Those skilled in the art will recognize additional features and advantages upon reading the following detailed description and on viewing the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

"The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification. The drawings illustrate the embodiments of the present invention and together with the description serve to explain principles of the invention. Other embodiments of the invention and intended advantages will be readily appreciated as they become better understood by reference to the following detailed description.

"FIG. 1 is a schematic cross-sectional view of a portion of a semiconductor device with emitter zones and channels according to an embodiment.

"FIG. 2A is a schematic cross-sectional view of a portion of a semiconductor device in accordance with an embodiment providing a completely depleted channel.

"FIG. 2B is a schematic cross-sectional view of a portion of a semiconductor device in accordance with an embodiment providing an ohmic contact between the channel and the collector electrode.

"FIG. 2C is a schematic cross-sectional view of a portion of a semiconductor device in accordance with an embodiment providing a Schottky contact between the channel and the collector electrode.

"FIG. 2D is a schematic cross-sectional view of a portion of a semiconductor device in accordance with an embodiment providing a Schottky contact and an additional layer spaced from the Schottky contact.

"FIG. 3A is a schematic cross-sectional view of a portion of a semiconductor device in accordance with an embodiment providing a channel with a lateral contraction.

"FIG. 3B is a schematic diagram illustrating the forward blocking capability of the semiconductor device of FIG. 3A.

"FIG. 3C is a schematic diagram showing the reverse blocking capability of the semiconductor device of FIG. 3A.

"FIG. 3D is a schematic diagram illustrating the forward conduction capability of the semiconductor device of FIG. 3A.

"FIG. 4A is a schematic cross-sectional view of a portion of a trench-type IGBT according to another embodiment.

"FIG. 4B is a schematic cross-sectional view of a portion of a super junction IGBT with planar gate electrodes in accordance with a further embodiment.

"FIG. 4C is a schematic cross-sectional view of a portion of an IGBT with an edge region in accordance with an embodiment referring to a local variation of emitter efficiency.

"FIG. 5A is a schematic cross-section of a semiconductor substrate for illustrating a method of manufacturing a reverse blocking semiconductor device after an unmasked implant with n-type impurities.

"FIG. 5B shows the semiconductor substrate of FIG. 5A after a masked implant with p-type impurities.

"FIG. 5C shows the semiconductor substrate of FIG. 5B after an etch using the impurity mask as an etch mask.

"FIG. 5D shows the semiconductor substrate of FIG. 5C after a laser thermal anneal.

"FIG. 6 is a simplified flow-chart for illustrating a method of manufacturing a semiconductor device in accordance with a further embodiment."

For additional information on this patent application, see: Laven, Johannes Georg; Baburske, Roman; Jaeger, Christian; Schulze, Hans-Joachim. Reverse Blocking Semiconductor Device, Semiconductor Device with Local Emitter Efficiency Modification and Method of Manufacturing a Reverse Blocking Semiconductor Device. Filed January 31, 2013 and posted August 7, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=5699&p=114&f=G&l=50&d=PG01&S1=20140731.PD.&OS=PD/20140731&RS=PD/20140731

Keywords for this news article include: Patents, Electronics, Semiconductor.

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Source: Electronics Newsweekly


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