The patent's assignee is
News editors obtained the following quote from the background information supplied by the inventors: "In a typical semiconductor process, multiple mutually exclusive process steps are used to produce separate semiconductor devices. For example, dedicated photolithographic, masking, and ion implantation process steps are often used to produce a polysilicon resistor within a semiconductor process. As another example, dedicated photolithographic masking and ion implantation process steps may be specifically adjusted for production of a bipolar junction transistor in a semiconductor process. These dedicated process steps can increase the cost and cycle time of individual wafers by as much as 5% or more, which can be significant both in terms of product gross margin and fab capacity. Thus, a need exists for systems, methods, and apparatus to address the shortfalls of present technology and to provide other new and innovative features."
As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "In one general aspect, a method can include implanting a first dopant, simultaneously, in a portion of a laterally diffused metal oxide semiconductor (LDMOS) device and in a portion of a resistor device included in a semiconductor device. The method can also include implanting a second dopant, simultaneously, in a portion of the LDMOS device and in a portion of a bipolar junction transistor (BJT) device in the semiconductor device.
"The details of one or more implementations are set forth in the accompanying drawings and the description below. Other features will be apparent from the description and drawings, and from the claims.
BRIEF DESCRIPTION OF THE DRAWINGS
"FIG. 1 is a block diagram that illustrates a side cross-sectional view of a polysilicon resistor, according to an embodiment.
"FIG. 2 is a diagram that illustrates a top mask level view of a polysilicon resistor.
"FIG. 3 is a side cross-sectional view of a bipolar junction transistor (BJT) device, according to an embodiment.
"FIG. 4 is a graph that illustrates a comparison of the dopant profiles of the BJT device shown in FIG. 3.
"FIG. 5 is a side cross-sectional view of another BJT device, according to an embodiment.
"FIG. 6A is a graph that illustrates a comparison of the dopant profiles of the BJT device shown in FIG. 5.
"FIG. 6B is another graph that illustrates comparisons of dopant profiles of a BJT device similar to that shown in FIG. 5.
"FIGS. 7A through 7M are diagrams that illustrate cross-sectional views of at least some process steps in a semiconductor process.
"FIG. 8 is a diagram that illustrates a table related to electrical parameters of BJT devices.
"FIG. 9 is a flowchart that illustrates a method of forming a BJT device.
"FIG. 10 is a flowchart that illustrates a method of forming a resistor device.
"FIG. 11 is a flowchart that illustrates a method of forming a resistor device and a BJT device.
"FIG. 12 is a diagram that illustrates an NPN device, a P-type laterally diffused metal oxide semiconductor (LDMOS) device, and a resistor device."
For additional information on this patent application, see: NASSAR, CHRISTOPHER; KIM, SUNGLYONG; LEIBIGER, STEVEN; HALL, JAMES. Production of Multiple Semiconductor Devices Using a Semiconductor Process. Filed
Keywords for this news article include: Electronics,
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