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Researchers Submit Patent Application, "Built-In Electronic Component Substrate and Method for Manufacturing the Substrate", for Approval

August 20, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Washington, D.C., VerticalNews journalists report that a patent application by the inventors TANAKA, Koichi (Nagano, JP); KURASHIMA, Nobuyuki (Nagano, JP); IIZUKA, Hajime (Nagano, JP); SHIRAKI, Satoshi (Nagano, JP), filed on January 9, 2014, was made available online on August 7, 2014.

The patent's assignee is Shinko Electric Industries Co., Ltd.

News editors obtained the following quote from the background information supplied by the inventors: "In recent years, for the purpose of, for example, size reduction or space reduction of substrates that include electronic components such as semiconductor chips, there is proposed a so-called 'built-in electronic component type wiring substrate' that has an electronic component (e.g., semiconductor chip) installed therein (hereinafter also referred to as 'built-in electronic component substrate').

"One example of the built-in electronic component substrate includes a first substrate to which a semiconductor chip is flip-chip bonded in a face-down state and a second substrate layered on the first substrate interposed by a substrate connection member (e.g., solder ball), wherein the semiconductor chip is encapsulated with resin between the first and second substrates.

"The processes for manufacturing the built-in electronic component substrate includes, for example, a process of manufacturing the first substrate onto which the semiconductor chip is mounted, a process of manufacturing the second substrate onto which the substrate connection member is mounted, and a process of layering the second substrate on the first substrate in a state where a substrate connection member mounting surface (i.e. surface for mounting the substrate connection member thereon) and a semiconductor chip mounting surface (i.e. surface for mounting the semiconductor chip thereon) face each other. After the above-described processes, a resin is supplied to fill in-between the first and the second substrates. Thereby, manufacturing of the built-in electronic-component substrate is completed.

"[Patent Document 1]: Japanese Laid-Open Patent Publication No. 2003-347722

"From the standpoint of reliability, resin is also supplied to fill in a space between a back surface of the semiconductor chip and the second substrate in the above-described resin filling-in process. Therefore, a sufficient space is to be provided between the back surface of the semiconductor chip and the second substrate, so that resin can fill in the space. Accordingly, the size of the substrate connection member is determined by taking into consideration the space between the back surface of the semiconductor chip and the second substrate.

"If the space between the back surface of the semiconductor chip and the second substrate becomes narrower than 40 .mu.m, it becomes difficult for resin to fill the space. Therefore, the space between the back surface of the semiconductor chip and the second substrate is, normally, set to be greater than or equal to 40 .mu.m.

"In a case of attempting to reduce the thickness of a built-in electronic component substrate by reducing the space between the back surface of the semiconductor chip and the second substrate, there is a risk that resin cannot be sufficiently supplied to fill the space between the back surface of the semiconductor chip and the second substrate. If resin does not sufficiently fill in-between the back surface of the semiconductor chip and the second substrate, voids may be generated in the space between the back surface of the semiconductor chip and the second substrate. In a case where voids are generated, the voids may become enlarged by absorbing moisture. Thereby, peeling of resin may occur in the vicinity of the voids. As a result, reliability of the built-in electronic component substrate is degraded.

"In other words, with a built-in electronic component substrate having the above-described configuration, a sufficient space between the back surface of the semiconductor chip and the second substrate becomes necessary for ensuring resin fillability with resin. Thus, the reduction of the thickness of the built-in electronic component substrate becomes difficult."

As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "According to an aspect of the invention, there is provided a built-in electronic component substrate including a first substrate, an electronic component including side surfaces and mounted on the first substrate, a first resin provided on the first substrate and covering the side surfaces of the electronic component, a second substrate provided above the electronic component and the first resin and layered on the first substrate, a substrate connection member provided between the first and the second substrates and electrically connecting the first and the second substrates, a second resin filling in between the electronic component and the second substrate and in between the first resin and the second substrate, and a third resin filling in between the first and the second substrates and encapsulating the substrate connection member, the electronic component, the first resin, and the second resin.

"The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims.

"It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention as claimed.

BRIEF DESCRIPTION OF DRAWINGS

"FIG. 1 is a cross-sectional view of a built-in electronic component substrate according to a first embodiment of the present invention;

"FIG. 2A-2D are schematic diagrams illustrating processes for manufacturing the built-in electronic component substrate according to the first embodiment of the present invention (part 1);

"FIG. 3A-3C are schematic diagrams illustrating processes for manufacturing the built-in electronic component substrate according to the first embodiment of the present invention (part 2);

"FIG. 4A-4C are schematic diagrams illustrating processes for manufacturing the built-in electronic component substrate according to the first embodiment of the present invention (part 3);

"FIG. 5 is a cross-sectional view illustrating a built-in electronic component substrate according to a first modified example of the first embodiment;

"FIG. 6 is a cross-sectional view illustrating a built-in electronic component substrate according to a second modified example of the first embodiment; and

"FIG. 7 is a cross-sectional view illustrating an example of applying a built-in electronic component substrate of the first embodiment."

For additional information on this patent application, see: TANAKA, Koichi; KURASHIMA, Nobuyuki; IIZUKA, Hajime; SHIRAKI, Satoshi. Built-In Electronic Component Substrate and Method for Manufacturing the Substrate. Filed January 9, 2014 and posted August 7, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=5563&p=112&f=G&l=50&d=PG01&S1=20140731.PD.&OS=PD/20140731&RS=PD/20140731

Keywords for this news article include: Electronics, Semiconductor, Shinko Electric Industries Co. Ltd.

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Source: Electronics Newsweekly


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