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Patent Issued for Pixel Structure, Method of Manufacturing Pixel Structure, and Active Device Matrix Substrate

August 20, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- A patent by the inventors Kuo, Feng-Weei (Pingtung County, TW); Jen, Ko-Ruey (Taipei, TW); Yu, Chia-Hua (New Taipei, TW); Wang, I-Fang (Changhua County, TW), filed on August 23, 2012, was published online on August 5, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8796688 is assigned to Hannstar Display Corporation (New Taipei, TW).

The following quote was obtained by the news editors from the background information supplied by the inventors: "The invention relates to a pixel structure, a method of manufacturing a pixel structure, and an active device matrix substrate. More particularly, the invention relates to a pixel structure that has favorable storage capacitors and is capable of displaying images with high quality, a method of manufacturing the pixel structure, and an active device matrix substrate with the pixel structure.

"Among the displays, liquid crystal display (LCD) has become the mainstream display. With the development of the LCD panels and the increasing requirements of the LCD panels for fast response speed, wide viewing angle, color shift prevention, etc., the LCDs may be in various display modes, e.g., multi-vertical alignment liquid crystal displays (MVA-LCD) capable of performing wide-viewing-angle display functions, in-plane switch liquid crystal displays (IPS-LCD), and so forth.

"In the conventional IPS-LCD, a substantially lateral electric field generated by the coplanar pixel electrode and common electrode reorients (tilts) liquid crystal molecules, which determines whether light is allowed to pass through the LCD or not. Since the storage capacitor in a pixel structure of the conventional IPS-LCD is overlay small, flickers are likely to occur in the display image of the IPS-LCD. When the flickering issue becomes worse, image retention and cross talk may easily happen.

"If, to better resolve the flickering issue, by increasing the amount of the storage capacitor in the pixel structure, the common electrode occupies the area of the pixel structure, which may however reduce the aperture ratio of the pixel structure and further deteriorate light utilization efficiency. Hence, the large storage capacitor and the high aperture ratio have been a trade-off issue for a long time, and thus it is necessary to develop a pixel structure that may have the large storage capacitor and the high aperture ratio."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "The invention is directed to a pixel structure that simultaneously having a favorable aperture ratio and a sufficiently large storage capacitor, and thereby images with satisfactory quality may be displayed.

"The invention is further directed to a method of manufacturing a pixel structure. By applying the method, the aforesaid pixel structure may be formed.

"The invention is further directed to an active device matrix substrate having the aforesaid pixel structure.

"In an embodiment of the invention, a pixel structure disposed on a substrate and driven by a scan line and a data line is provided. The pixel structure includes a first patterned metal layer disposed on a substrate and having a common line and a gate, a first insulation layer covering the first patterned metal layer, a semiconductor pattern located on the first insulation layer above the gate, a second patterned metal layer disposed on the first insulation layer and having a source and a drain both electrically connected to the semiconductor pattern, a second insulation layer covering the second patterned metal layer and having a contact opening exposing the drain, and an electrode layer disposed on the second insulation layer and having a pixel electrode and a common electrode. The pixel electrode is connected to the drain through the contact opening. The common line, the first insulation layer, and the pixel electrode together constitute a first storage capacitor. The common line, the drain, and the common electrode together constitute a sandwich-like structure. The common line, the first insulation layer, and the drain together constitute a second storage capacitor. The drain, the second insulation layer, and the common electrode together constitute a third storage capacitor. A portion of the drain is extended above the common line and overlapped with the first insulation layer above the common line.

"According to an embodiment of the invention, a portion of the common electrode is extended above the common line and overlapped with the second insulation layer above the common line.

"According to an embodiment of the invention, the pixel electrode and the common electrode are alternately arranged.

"According to an embodiment of the invention, a portion of the scan line is the gate.

"According to an embodiment of the invention, a portion of the data line is the source.

"According to an embodiment of the invention, the gate, the source, and the drain together constitute an active switch device.

"According to an embodiment of the invention, a material of the electrode layer is selected from indium tin oxide (ITO), indium zinc oxide (IZO), and a combination thereof.

"In an embodiment of the invention, a method of manufacturing a pixel structure on a substrate is provided. The pixel structure is driven by a scan line and a data line, and the method includes but is not limited to following steps. A first patterned metal layer is formed on the substrate, and the first patterned metal layer has a common line and a gate. A first insulation layer is formed, and the first insulation layer covers the first patterned metal layer. A semiconductor pattern is formed on the first insulation layer above the gate. A second patterned metal layer is formed on the first insulation layer, and the second patterned metal layer has a source and a drain. The source and the drain are electrically connected to the semiconductor pattern. A second insulation layer is formed to cover the second patterned metal layer, and the second insulation layer has a contact opening that exposes the drain. An electrode layer is formed on the second insulation layer, and the electrode layer has a pixel electrode and a common electrode. The pixel electrode is connected to the drain through the contact opening. Here, the common line, the first insulation layer, and the pixel electrode together constitute a first storage capacitor; the common line, the drain, and the common electrode together constitute a sandwich structure; the common line, the first insulation layer, and the drain together constitute a second storage capacitor; the drain, the second insulation layer, and the common electrode together constitute a third storage capacitor. A portion of the drain is extended above the common line and overlapped with the first insulation layer above the common line.

"According to an embodiment of the invention, a portion of the common electrode is extended above the common line and overlapped with the second insulation layer above the common line.

"According to an embodiment of the invention, the pixel electrode and the common electrode are alternately arranged.

"According to an embodiment of the invention, a portion of the scan line is the gate.

"According to an embodiment of the invention, a portion of the data line is the source.

"According to an embodiment of the invention, the gate, the source, and the drain together constitute an active switch device.

"According to an embodiment of the invention, a material of the electrode layer is selected from ITO, IZO, and a combination thereof.

"In an embodiment of the invention, an active device matrix substrate including a substrate and a plurality of pixel structures disposed on the substrate is provided. Each of the pixel structures includes a first patterned metal layer disposed on a substrate and having a common line and a gate, a first insulation layer covering the first patterned metal layer, a semiconductor pattern located on the first insulation layer above the gate, a second patterned metal layer disposed on the first insulation layer and having a source and a drain both electrically connected to the semiconductor pattern, a second insulation layer covering the second patterned metal layer and having a contact opening exposing the drain, and an electrode layer disposed on the second insulation layer and having a pixel electrode and a common electrode. The pixel electrode is connected to the drain through the contact opening. Here, the common line, the first insulation layer, and the pixel electrode together constitute a first storage capacitor; the common line, the drain, and the common electrode together constitute a sandwich structure; the common line, the first insulation layer, and the drain together constitute a second storage capacitor; the drain, the second insulation layer, and the common electrode together constitute a third storage capacitor. A portion of the drain is extended above the common line and overlapped with the first insulation layer above the common line.

"According to an embodiment of the invention, a portion of the common electrode is extended above the common line and overlapped with the second insulation layer above the common line.

"According to an embodiment of the invention, the pixel electrode and the common electrode are alternately arranged.

"In an embodiment of the invention, a pixel structure that is disposed on a substrate and driven by a scan line and a data line is provided. The pixel structure includes a first patterned metal layer disposed on a substrate and having a common line and a gate, a first insulation layer covering the first patterned metal layer, a semiconductor pattern located on the first insulation layer above the gate, a second patterned metal layer disposed on the first insulation layer and having a source and a drain both electrically connected to the semiconductor pattern, a first electrode layer disposed above the second patterned metal layer and electrically connected to the drain, a second insulation layer covering the first electrode layer, and a second electrode layer disposed on the second insulation layer. Here, the common line, the first insulation layer, and the first electrode layer together constitute a first storage capacitor; the first electrode layer, the second insulation layer, and the second electrode layer together constitute a second storage capacitor; a portion of the drain is extended above the common line and overlapped with the first insulation layer above the common line.

"According to an embodiment of the invention, a portion of the second electrode layer is extended above the common line and overlapped with the second insulation layer above the common line.

"According to an embodiment of the invention, a material of the first electrode layer and a material of the second electrode layer are selected from ITO, IZO, and a combination thereof.

"As described above, in the pixel structure described above, the common line, the first insulation layer, and the pixel electrode pixel together constitute the first storage capacitor. Besides, within the limited area, the overlapping area of the common line, the drain, and the common electrode constitutes a sandwich structure, which may further increase the amount of the storage capacitor. Namely, the common line, the first insulation layer, and the drain together constitute the second storage capacitor, and the drain, the second insulation layer, and the common electrode together constitute the third storage capacitor. Hence, the area of the pixel structure is not additionally occupied, and the pixel structure can still have the favorable aperture ratio. Moreover, the amount of the storage capacitor is sufficient. As a result, the pixel structure described herein may simultaneously have a favorable aperture ratio and a sufficiently large storage capacitor, and thereby images with satisfactory quality may be displayed.

"In order to make the aforementioned and other features and advantages of the invention more comprehensible, several embodiments accompanied with figures are described in detail below."

URL and more information on this patent, see: Kuo, Feng-Weei; Jen, Ko-Ruey; Yu, Chia-Hua; Wang, I-Fang. Pixel Structure, Method of Manufacturing Pixel Structure, and Active Device Matrix Substrate. U.S. Patent Number 8796688, filed August 23, 2012, and published online on August 5, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8796688.PN.&OS=PN/8796688RS=PN/8796688

Keywords for this news article include: Electronics, Semiconductor, Hannstar Display Corporation.

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Source: Electronics Newsweekly


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