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Researchers Submit Patent Application, "Design System for Semiconductor Device, Method for Manufacturing Semiconductor Device, Semiconductor Device...

July 16, 2014



Researchers Submit Patent Application, "Design System for Semiconductor Device, Method for Manufacturing Semiconductor Device, Semiconductor Device and Method for Bonding Substrates", for Approval

By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Washington, D.C., VerticalNews journalists report that a patent application by the inventors SUGAYA, Isao (Kawasaki-shi, JP); HORIKOSHI, Takahiro (Chofu-shi, JP); OKAMOTO, Kazuya (Yokohama-shi, JP), filed on January 2, 2013, was made available online on July 3, 2014.

No assignee for this patent application has been made.

News editors obtained the following quote from the background information supplied by the inventors: "The present invention relates to a semiconductor device design system, a semiconductor device manufacturing method, a semiconductor device and a substrate bonding apparatus. The present invention particularly relates to a semiconductor device design system manufactured by means of bonding a plurality of substrates, a semiconductor device manufacturing method, a semiconductor device and a substrate bonding apparatus.

"In semiconductor devices, there are those that bond and three-dimensionally laminate a plurality of substrates to improve the performance of said devices without increasing the area of the device overall. In the case in which a plurality of substrates are to be bonded, electrical connection between the substrates is performed by terminals called 'bumps,' which are disposed on the respective substrates, being joined (for example, see Japanese Unexamined Patent Application Publication No. 2007-115978).

"However, when there is variation in the heights of the bumps disposed on the substrate, there is no joining between the low bumps, and junction defects occur.

"Therefore, the purpose is to provide, at one of the side surfaces of the present invention, a semiconductor device design system, a semiconductor device manufacturing method, a semiconductor device and a substrate bonding apparatus that are able to solve the above problems. This purpose is achieved by combinations of special characteristics described in the independent claims of the Scope of Patent Claims. In addition, dependent claims define further advantageous specific examples of the present invention."

As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "In order solve the above problems, provided in the first mode of the present invention is a semiconductor device design system comprising a numerical value acquiring part, which acquires the numerical value of at least one calculation parameter, a junction estimating part that, in the case in which, between at least two substrates on which a plurality of terminals has been provided, the respective substrates are pressed at a prescribed pressure so that the front end faces of the respective mutually corresponding terminals come into contact, estimates whether or not the respective mutually opposing terminals will be respectively joined based on the numerical values of the calculation parameters acquired by the numerical value acquiring part, and a change processing part which, in the case in which it has been estimated by the junction estimating part that any of the respective terminals will not be joined, gives a warning or performs processing so as to change the numerical value of at least one of the calculation parameters from among the calculation parameters acquired by the numerical value acquiring part.

"In addition, provided in the second mode of the present invention is a semiconductor device manufacturing method comprising a numerical value acquiring stage, which acquires the numerical value of at least one calculation parameter, a junction estimating stage, which, in the case in which at least two substrates on which a plurality of terminals has been provided are pressed at a prescribed pressure so that the front end faces of the respective mutually corresponding terminals come into contact between the two substrates, estimates whether or not the respective mutually opposing terminals will be respectively joined based on the numerical values of the calculation parameters acquired by the numerical value acquiring stage, and a change processing stage which, in the case in which it has been estimated by the junction estimating stage that any of the respective terminals will not be joined, gives a warning or performs processing so as to change the numerical value of at least one of the calculation parameters from among the calculation parameters acquired by the numerical value acquiring stage.

"Provided in the third mode of the present invention is a semiconductor device manufactured by means of a numerical value acquiring stage, which acquires the numerical value of at least one calculation parameter, a junction estimating stage, which, in the case in which at least two substrates on which a plurality of terminals has been provided are pressed at a prescribed pressure so that the front end faces of the respective mutually corresponding terminals come into contact between the two substrates, estimates whether or not the respective mutually opposing terminals will be respectively joined based on the numerical values of the calculation parameters acquired by the numerical value acquiring stage, and a change processing stage which, in the case in which it has been estimated by the junction estimating stage that any of the respective terminals will not be joined, gives a warning or performs processing so as to change the numerical value of at least one of the calculation parameters from among the calculation parameters acquired by the numerical value acquiring stage.

"Provided in the fourth mode of the present invention is a substrate bonding apparatus comprising a first substrate holding part, which holds a first substrate that has a plurality of terminals, a second substrate holding part, which holds a second substrate that has a plurality of terminals, a numerical value input part, which inputs the numerical value of at least one calculation parameter, a calculating part, which calculates the amount of compression of the respective terminals and the amount of bending of the respective substrates when the first substrate and the second substrate are pressed so that the front end faces of the respective terminals of the first substrate come into contact with the front end faces of corresponding terminals among the respective terminals of the second substrate based on the numerical values of the calculation parameters input from the numerical value input part, a parameter determining part, which determines a process parameter value so that the total of the compression amount and the bending amount calculated by the calculating part becomes larger than a prescribed value, and a pressing part, which presses the first substrate, which is held by the first substrate holding part, and the second substrate, which is held by the second substrate holding part, so that the front end faces of the respective terminals of the first substrate and the front end faces of the respective terminals of the second substrate come into contact based on the process parameter value determined by the parameter determining part.

"Note that the above outline of the invention does not enumerate all of the required special characteristics of the present invention. In addition, sub-combination of these special characteristics groups may also result in the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS

"FIG. 1 is a cross-sectional view that schematically shows the structure of a substrate bonding apparatus 200.

"FIG. 2(a) is a cross-sectional view that schematically shows substrates 20 and 50, and FIG. 2(b) is a plan view thereof.

"FIG. 3 shows a functional block of a design system 10.

"FIG. 4 is a schematic drawing for describing a plurality of calculation parameters.

"FIG. 5 is a flow chart that shows a processing operation S10 of the design system 10.

"FIG. 6 is an example of calculation results resulting from the design system 10.

"FIG. 7 is an example of calculation results resulting from the design system 10.

"FIG. 8 is a schematic drawing that shows another example of substrates 20 and 50.

"FIG. 9 is a schematic drawing that describes an example of a method of approximating the variation C of the heights of the bumps 22, etc.

"FIG. 10 shows a functional block of a control part 270 of another embodiment."

For additional information on this patent application, see: SUGAYA, Isao; HORIKOSHI, Takahiro; OKAMOTO, Kazuya. Design System for Semiconductor Device, Method for Manufacturing Semiconductor Device, Semiconductor Device and Method for Bonding Substrates. Filed January 2, 2013 and posted July 3, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=257&p=6&f=G&l=50&d=PG01&S1=20140626.PD.&OS=PD/20140626&RS=PD/20140626

Keywords for this news article include: Patents, Electronics, Semiconductor.

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Source: Electronics Newsweekly


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