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Patent Issued for Semiconductor Trench Isolation Including Polysilicon and Nitride Layers

July 16, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- According to news reporting originating from Alexandria, Virginia, by VerticalNews journalists, a patent by the inventors Lee, Dong-kak (Seoul, KR); Hwang, Hee-don (Yongin-si, KR), filed on September 6, 2011, was published online on July 1, 2014.

The assignee for this patent, patent number 8766355, is Samsung Electronics Co., Ltd. (KR).

Reporters obtained the following quote from the background information supplied by the inventors: "Various embodiments described herein relate to semiconductor devices and methods of manufacturing the same, and more particularly, to semiconductor devices having device isolation patterns using a trench, and methods of manufacturing the semiconductor devices.

"As the integration degree of semiconductor devices continues to increase, the design rules for components of the semiconductor device continue to be reduced. In particular, a gate length, which is a standard for the design rule of semiconductor devices that use a large number of transistors, continues to be reduced. The reduced gate length can deteriorate voltage and/or current characteristics of the semiconductor devices that are scaled down."

In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventors' summary information for this patent: "Various embodiments described herein can provide structures of semiconductor devices that can reduce or prevent hot electron induced punch through (HEIP).

"Various embodiments described herein can also provide methods of manufacturing semiconductor devices that can reduce or prevent HEIP.

"Semiconductor devices according to various embodiments described herein comprise a semiconductor substrate including a trench therein, a polysilicon layer pattern on a surface of the trench, a nitride layer pattern on the polysilicon layer pattern remote from the surface of the trench, and an insulation layer pattern on the nitride layer pattern remote from the polysilicon layer pattern.

"Semiconductor devices according to various other embodiments described herein comprise a semiconductor substrate including a trench therein, a gate electrode structure on the semiconductor substrate, and a device isolation pattern in the trench. The device isolation pattern comprises a polysilicon layer pattern on a surface of the trench, a nitride layer pattern on the polysilicon layer pattern remote from the surface of the trench, and an insulation layer pattern on the nitride layer pattern remote from the polysilicon layer pattern. The polysilicon layer pattern is doped with impurities.

"Semiconductor devices according to still other embodiments described herein comprise a semiconductor substrate including a trench therein, a first conformal layer on the surface of the trench and a second conformal layer on the first conformal layer remote from the surface of the trench. The second conformal layer is configured to trap carriers of a first conductivity type, such as electrons, therein that pull carriers of a second conductivity type, such as holes, from the semiconductor substrate adjacent the surface of the trench into the first conformal layer. As used herein, a 'conformal' layer means a layer having opposing surfaces that both conform to a contour of the underlying layer or region on which the conformal layer extends.

"In some embodiments, the first conformal layer comprises polysilicon and the second conformal layer comprises nitride. The polysilicon may be doped and/or the first conformal layer may be recessed from an opening of the trench. An active semiconductor device may be provided in the semiconductor substrate adjacent the trench."

For more information, see this patent: Lee, Dong-kak; Hwang, Hee-don. Semiconductor Trench Isolation Including Polysilicon and Nitride Layers. U.S. Patent Number 8766355, filed September 6, 2011, and published online on July 1, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8766355.PN.&OS=PN/8766355RS=PN/8766355

Keywords for this news article include: Semiconductor, Samsung Electronics Co. Ltd..

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Source: Electronics Newsweekly


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