News Column

Patent Issued for Semiconductor Package and Fabrication Method

July 16, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Alexandria, Virginia, VerticalNews journalists report that a patent by the inventors Hsu, Tsung-Hsien (Taichung Hsien, TW); Fang, Hao-Ju (Taichung Hsien, TW); Chung, Hsin-Lung (Taichung Hsien, TW), filed on April 27, 2012, was published online on July 1, 2014.

The patent's assignee for patent number 8766416 is Siliconware Precision Industries Co., Ltd. (Taichung, TW).

News editors obtained the following quote from the background information supplied by the inventors: "The present invention relates to semiconductor packages and fabrication methods thereof, and more particularly, to a semiconductor package having an electromagnetic shielding function and a fabrication method thereof.

"Along with the progress of semiconductor technologies, various package types have been developed for electronic products so as to improve the overall electrical performance. In particular, a lot of electronic products have an electromagnetic shielding function so as to shield the electronic products from electromagnetic interference (EMI).

"U.S. Pat. No. 5,166,772 discloses a semiconductor package having an electromagnetic shielding function. Referring to FIGS. 1A and 1B, a semiconductor chip 11 is disposed on and electrically connected to a substrate 10. Then, a perforated metal shield 12 is disposed on the substrate 10 to cover the semiconductor chip 11. Thereafter, an encapsulant 13 is formed to encapsulate the metal shield 12 and the semiconductor chip 11. Therein, the metal shield 12 is grounded through at least a plated through hole (PTH) 14.

"However, the plate through hole 14 occupies a lot of spaces of the substrate 10 and limits the layout of circuits on the substrate 10, thereby reducing the circuit layout flexibility.

"Therefore, there is a need to provide a semiconductor package and a fabrication method thereof so as to save substrate spaces and increase the overall circuit layout flexibility."

As a supplement to the background information on this patent, VerticalNews correspondents also obtained the inventors' summary information for this patent: "In view of the above-described drawbacks, the present invention provides a semiconductor package, which comprises: a substrate having a first surface and a second surface opposite to the first surface, wherein a ground layer is formed in the substrate and partially exposed through at least a recessed portion of the second surface; a semiconductor chip disposed on the first surface of the substrate; an encapsulant formed on the first surface of the substrate for encapsulating the semiconductor chip; and a metal layer covering the encapsulant and the substrate and extending to the recessed portion for electrically connecting the ground layer.

"In the above-described semiconductor package, the recessed portion can be located at a corner or an edge of the second surface.

"In the above-described semiconductor package, the semiconductor chip can be electrically connected to the substrate through wire bonding or in a flip-chip manner.

"The present invention further provides a fabrication method of a semiconductor package, which comprises the steps of: (A) providing a substrate having opposite first and second surfaces, allowing a semiconductor chip to be disposed on the first surface of the substrate, an encapsulant to be formed on the first surface of the substrate to encapsulate the semiconductor chip, and a ground layer to be formed in the substrate and partially exposed through at least a recessed portion formed in the second surface of the substrate; and (B) forming a metal layer for covering the encapsulant and the substrate and extending to the recessed portion for electrically connecting the ground layer.

"In the above-described method, step (A) can further comprise the steps of: providing the substrate having the opposite first and second surfaces and the ground layer therein; forming the recessed portion in the second surface of the substrate for exposing portions of the ground layer; disposing the semiconductor chip on the first surface of the substrate; and forming the encapsulant on the first surface of the substrate to encapsulate the semiconductor chip.

"In the above-described method, the recessed portion can be located at a corner or an edge of the second surface.

"In the above-described method, the recessed portion can be formed by mechanical drilling or laser drilling.

"In the above-described method, the semiconductor chip can be electrically connected to the substrate through wire bonding or in a flip-chip manner.

"In the above-described method, the metal layer can be formed by sputtering.

"In the above-described semiconductor package and method, the substrate can be a packaging substrate or a circuit board.

"According to the present invention, at least a recessed portion is formed in the bottom surface of a substrate so as to expose the ground layer inside the substrate. As such, a metal layer can be formed to extend to the recessed portion for electrically connecting the ground layer. Therefore, the present invention dispenses with the plated through hole as required in the prior art so as to save substrate spaces and improve the circuit layout flexibility."

For additional information on this patent, see: Hsu, Tsung-Hsien; Fang, Hao-Ju; Chung, Hsin-Lung. Semiconductor Package and Fabrication Method. U.S. Patent Number 8766416, filed April 27, 2012, and published online on July 1, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8766416.PN.&OS=PN/8766416RS=PN/8766416

Keywords for this news article include: Electronics, Electromagnet, Semiconductor, Siliconware Precision Industries Co. Ltd.

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Source: Electronics Newsweekly


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