News Column

Patent Issued for Method of Manufacturing Non-Volatile Memory Devices

July 16, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- A patent by the inventors Lim, Su Hyun (Seoul, KR); Lee, Seung Cheol (Gyeonggi-do, KR), filed on February 16, 2012, was published online on July 1, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8765587 is assigned to Hynix Semiconductor Inc. (Gyeonggi-do, KR).

The following quote was obtained by the news editors from the background information supplied by the inventors: "Exemplary embodiments relate to a method of manufacturing non-volatile memory devices and, more particularly, to a method of forming trenches for isolation.

"FIG. 1 is a photograph illustrating known features of a conventional non-volatile memory device.

"As non-volatile memory devices are manufactured with a higher degree of integration, a stack layer GP for a gate has narrower width, but becomes higher.

"The stack layer GP is formed by forming a plurality of stack layers, including a gate insulating layer, a conductive layer for floating gates, and a hard mask layer, over a semiconductor substrate and then patterning the stack layers. After the stack layers are formed, part of the semiconductor substrate exposed between the stack layers is etched to form trenches for isolation.

"An etch process for forming the trenches for isolation is performed using a dry etch process. Here, fumes 10 may be formed because by-products generated during the dry etch process are stagnated. If a cleaning process for removing the fumes 10 is performed after the trenches are formed, it takes relatively long time to fully remove the fumes 10 stagnated while the trenches are formed, thereby increasing time of manufacturing a non-volatile memory device. In particular, since tension between a cleaning solution used in the cleaning process and the stack layers GP is increased, the stack layers GP may be inclined (refer to a photograph (A) of FIG. 1). If the stack layers GP are inclined, the yield of the non-volatile memory device is lowered because the adjacent stack layers GP may be interconnected. If a cleaning process is not performed for preventing the occurrence of this inclination phenomenon, the non-volatile memory device may be manufactured with defects at the portions where the fumes are generated as shown in a photograph (B) of FIG. 1, thereby reducing the yield."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "According to exemplary embodiments, by-products are prevented from being generated due to fumes on a surface of stack layers for gates and the stack layers are prevented from being inclined by forming trenches for isolation through a plurality of dry etch processes and cleaning processes.

"A method of manufacturing non-volatile memory devices according to exemplary embodiment of the present invention includes forming a gate insulating layer and a first conductive layer over a semiconductor substrate; etching the first conductive layer and the gate insulating layer to expose part of the semiconductor substrate; forming trenches at a target depth of the semiconductor substrate by repeatedly performing a dry etch process for etching the exposed semiconductor substrate and a cleaning process for removing residues generated in the dry etch process; forming isolation layers within the trenches; forming a dielectric layer on a surface of the entire structure in which the isolation layers are formed; and forming a second conductive layer on the dielectric layer.

"A method of manufacturing non-volatile memory devices according to another exemplary embodiment of the present invention includes forming a gate insulating layer and a first conductive layer over a semiconductor substrate; etching the first conductive layer and the gate insulating layer to expose part of the semiconductor substrate; forming trenches having a first depth shallower than a target depth by repeatedly performing a primary dry etch process for etching the exposed semiconductor substrate and a wet cleaning process for removing residues generated in the primary dry etch process; performing a secondary dry etch process for the trenches to have the target depth; performing a dry cleaning process for removing residues generated in the secondary dry etch process; forming isolation layers within the trenches; forming a dielectric layer on a surface of the entire structure in which the isolation layers are formed; and forming a second conductive layer on the dielectric layer.

"A method of manufacturing non-volatile memory devices according to yet another exemplary embodiment of the present invention includes forming stack layers over a semiconductor substrate; forming mask patterns on the stack layers; repeating a dry etch process and a wet cleaning process in order to etch the stack layer exposed between the mask patterns up to a first depth; and patterning the stack layers to be etched up to a target depth by performing a dry etch process when the stack layers are etched up to the first depth."

URL and more information on this patent, see: Lim, Su Hyun; Lee, Seung Cheol. Method of Manufacturing Non-Volatile Memory Devices. U.S. Patent Number 8765587, filed February 16, 2012, and published online on July 1, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8765587.PN.&OS=PN/8765587RS=PN/8765587

Keywords for this news article include: Electronics, Hynix Semiconductor Inc..

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Source: Electronics Newsweekly


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