The patent's inventors are Sharon, Eran (Rishon Lezion, IL); Alrod, Idan (Herzliya, IL).
This patent was filed on
From the background information supplied by the inventors, news correspondents obtained the following quote: "Non-volatile memory devices, such as universal serial bus (USB) flash memory devices or removable storage cards, have allowed for increased portability of data and software applications. Flash memory devices can enhance data storage density by storing multiple bits in each flash memory cell. For example,
"Storing multiple bits of information in a single flash memory cell typically includes mapping sequences of bits to states of the flash memory cell. For example, a first sequence of bits '110' may correspond to a first state of a flash memory cell and a second sequence of bits '010' may correspond to a second state of the flash memory cell. After determining that a sequence of bits is to be stored into a particular flash memory cell, the flash memory cell may be programmed to a state that corresponds to the sequence of bits.
"Once the memory cells in the memory device have been programmed, data may be read from the memory cells by sensing the programming states of the memory cells. However, sensed programming states can sometimes vary from the written programming states due to one or more factors. Error correction decoding can be used to correct data errors resulting from read states that do not match written states. In addition, 'soft' bits may be read from the memory cells by performing additional sense operations to provide additional information regarding the state of the cells. Soft bit information may be used to improve an effectiveness of error correction decoding. However, performing the additional sense operations to generate the soft bits introduces additional latency that may degrade a read performance of the memory device."
Supplementing the background information on this patent, VerticalNews reporters also obtained the inventors' summary information for this patent: "Hard bits of a first logical page of a MLC memory are used as soft bits of a second logical page of the MLC memory. Reliability information may be generated based on the soft bits and used during decoding of the second logical page. Decoding of the second logical page may be enhanced by using the reliability information while avoiding a read performance penalty associated with reading conventional soft bits from the MLC memory."
For the URL and additional information on this patent, see: Sharon, Eran; Alrod, Idan. Reading Data from
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