News Column

Patent Issued for Co-Support System and Microelectronic Assembly

August 6, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- According to news reporting originating from Alexandria, Virginia, by VerticalNews journalists, a patent by the inventors Crisp, Richard Dewitt (Hornitos, CA); Haba, Belgacem (Saratoga, CA); Zohni, Wael (San Jose, CA), filed on March 15, 2013, was published online on July 22, 2014.

The assignee for this patent, patent number 8787034, is Invensas Corporation (San Jose, CA).

Reporters obtained the following quote from the background information supplied by the inventors: "The subject matter of the present application relates to microelectronic structures, e.g., structures incorporating active circuit elements, such as, without limitation, structures including at least one semiconductor chip or portion of at least one semiconductor chip, as well as assemblies incorporating microelectronic structures.

"Semiconductor chips are commonly provided as individual, prepackaged units. A standard chip has a flat, rectangular body with a large front face having contacts connected to the internal circuitry of the chip. Each individual chip typically is contained in a package having external terminals connected to the contacts of the chip. In turn, the terminals, i.e., the external connection points of the package, are configured to electrically connect to a circuit panel, such as a printed circuit board. In many conventional designs, the chip package occupies an area of the circuit panel considerably larger than the area of the chip itself. As used in this disclosure with reference to a flat chip having a front face, the 'area of the chip' should be understood as referring to the area of the front face.

"Size is a significant consideration in any physical arrangement of chips. The demand for more compact physical arrangements of chips has become even more intense with the rapid progress of portable electronic devices. Merely by way of example, devices commonly referred to as 'smart phones' integrate the functions of a cellular telephone with powerful data processors, memory and ancillary devices such as global positioning system receivers, electronic cameras, and local area network connections along with high-resolution displays and associated image processing chips. Such devices can provide capabilities such as full internet connectivity, entertainment including full-resolution video, navigation, electronic banking and more, all in a pocket-size device. Complex portable devices require packing numerous chips into a small space. Moreover, some of the chips have many input and output connections, commonly referred to as 'I/Os.' These I/Os must be interconnected with the I/Os of other chips. The components which form the interconnections should not greatly increase the size of the assembly. Similar needs arise in other applications as, for example, in data servers such as those used in internet search engines where increased performance and size reduction are needed.

"Microelectronic elements such as semiconductor chips which contain memory storage arrays, particularly dynamic random access memory chips (DRAMs) and flash memory chips, are commonly packaged in single- or multiple-chip packages and assemblies. Each package has many electrical connections for carrying signals, power and ground between terminals and the microelectronic elements, e.g., chips therein. The electrical connections can include different kinds of conductors such as horizontal conductors, e.g., traces, beam leads, etc., which extend in a horizontal direction relative to a contact-bearing surface of a chip, vertical conductors such as vias, which extend in a vertical direction relative to the surface of the chip, and wire bonds which extend in both horizontal and vertical directions relative to the surface of the chip.

"Conventional microelectronic packages can incorporate a microelectronic element having active elements defining a memory storage array. Thus, in some conventional microelectronic elements, transistors or other active elements, constitute a memory storage array with or without additional elements. In some cases, the microelectronic element can be configured to predominantly provide memory storage array function, i.e., in which case microelectronic element may embody a greater number of active elements to provide memory storage array function than any other function. In some cases, a microelectronic element may be or include a DRAM chip, or may be or include a stacked electrically interconnected assembly of such semiconductor chips. Typically, all of the terminals of such package are placed in sets of columns adjacent to one or more peripheral edges of a package substrate to which the microelectronic element is mounted.

"Conventional circuit panels or other microelectronic components are typically configured to be coupled to a microelectronic package having one or more first type microelectronic elements therein. Such circuit panels or other microelectronic components typically cannot be coupled to a microelectronic package having one or more microelectronic elements therein that are of a different or second type.

"In light of the foregoing, certain improvements in the design of circuit panels or other microelectronic components can be made in order to improve the functional flexibility thereof, particularly in circuit panels or other microelectronic components to which packages can be mounted and electrically interconnected with one another."

In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventors' summary information for this patent: "In accordance with an aspect of the invention, a system can include a microelectronic assembly which includes a set of terminals and a microelectronic element having a memory storage array having a given number of storage locations, the microelectronic element of the assembly having inputs connected with the terminals for receiving command and address information specifying one of the storage locations, and a component for connection with the microelectronic assembly. The component can include a support structure bearing a set of conductors configured to carry the command and address information, and a plurality of contacts coupled to the set of conductors, the contacts electrically connected with corresponding ones of the terminals of the microelectronic assembly.

"The contacts can have address and command information assignments arranged according to a first predetermined arrangement for connection with a first type of the microelectronic assembly in which the microelectronic element is configured to sample the command and address information coupled thereto through the contacts at a first sampling rate, the contacts having a first number thereof. The contacts can have address and command information assignments arranged according to a second predetermined arrangement for connection with a second type of the microelectronic assembly in which the microelectronic element is configured to sample the command and address information coupled thereto through a subset of the contacts including a second number of the contacts at a second sampling rate being greater than the first sampling rate, the subset including some contacts occupying identical positions with the contacts that are assigned to the first predetermined arrangement, the second number being fewer than the first number.

"In one example, all of the contacts of the subset of contacts arranged according to the second predetermined arrangement can occupy identical positions with the contacts that are assigned to the first predetermined arrangement. In one embodiment, the second sampling rate can be an integer multiple of the first sampling rate. In a particular example, the system can also include a device coupled to the set of conductors, the device being operable to drive the command and address information to the contacts. In an exemplary embodiment, the device can be a microprocessor. In one example, the device can be configured to operate in each of first and second modes for connection of the component with the first type microelectronic assembly via the first arrangement, and with the second type microelectronic assembly via the second arrangement, respectively. In a particular embodiment, the system can also include at least one central processing unit ('CPU'). The CPU can be configured to control operations of a plurality of components in the system including read operations from the microelectronic assembly and write operations to the microelectronic assembly.

"In a particular example, the system can also include a power supply configured to supply power for use by the component and the microelectronic assembly. In one embodiment, the microelectronic assembly can be the first type microelectronic assembly. In an exemplary embodiment, the microelectronic assembly can be the second type microelectronic assembly. In one example, the component can be a circuit panel, and the contacts can be exposed at a surface of the circuit panel. In a particular embodiment, the microelectronic assembly can be a microelectronic package. The terminals can be surface mount terminals exposed at a surface of the microelectronic package.

"In an exemplary embodiment, the circuit panel can be a motherboard. In one embodiment, the circuit panel can be a module card, the module card including one or more rows of exposed module contacts, at least one of the rows of module contacts disposed adjacent an edge of the first or second surfaces for mating with contacts of a socket of a second circuit panel when the module is inserted in the socket. In a particular example, the component can be a circuit panel, and the contacts can be disposed in a socket electrically connected with the circuit panel. In one example, the microelectronic assembly can include a module card having first and second opposed surfaces. The terminals can be a plurality of parallel exposed terminals adjacent an edge of at least one of the first and second surfaces for mating with the contacts of the socket when the module is inserted in the socket.

"In a particular embodiment, the component can be a circuit panel and the contacts can be disposed in a connector electrically connected with the circuit panel. The microelectronic assembly can include a module card having first and second opposed surfaces. The terminals can be a plurality of parallel terminals exposed at one of the first and second surfaces for mating with the contacts of the connector when the module is attached to the connector. In one embodiment, the microelectronic assembly can be a first microelectronic assembly and the component can be a second microelectronic assembly, and the contacts can be terminals of the second microelectronic assembly.

"In a particular example, the second microelectronic assembly can be coupled to the support structure and includes a microelectronic element having active devices therein. The microelectronic element of the first microelectronic assembly can be coupled with the microelectronic element of the second microelectronic assembly by electrical connections that extend only within the first and second microelectronic assemblies. In an exemplary embodiment, the electrical connections between the microelectronic element of the first microelectronic assembly and the microelectronic element of the second microelectronic assembly can include interconnection elements extending in a direction normal to a surface of the second microelectronic assembly at which the terminals of the second microelectronic assembly are exposed. The interconnection elements can be configured for package-on-package stacking.

"In one example, the electrical connections between the microelectronic element of the first microelectronic assembly and the microelectronic element of the second microelectronic assembly can include a bond via array extending from the terminals of the second microelectronic assembly to contacts exposed at a surface of a substrate of the second microelectronic assembly. In a particular embodiment, the second microelectronic assembly can be coupled to the support structure and includes a microelectronic element having active devices therein, the terminals of the second microelectronic assembly being exposed at a surface of the microelectronic element of the second microelectronic assembly.

"In one embodiment, the microelectronic element of the second microelectronic assembly can be a first microelectronic element. The second microelectronic assembly can also include at least one second microelectronic element each having active devices therein. The first and second microelectronic elements can be arranged in a stacked configuration. In a particular example, the terminals of the second microelectronic assembly can be electrically connected with the set of conductors of the support structures by through-silicon vias extending through the at least one second microelectronic element.

"In an exemplary embodiment, the microelectronic element of the second microelectronic assembly can include a logic function. In one example, the contacts can be first contacts and the conductors can be a first set of conductors. The component can also include a plurality of second contacts coupled to a second set of conductors. The second contacts can be configured for connection with corresponding terminals of the microelectronic assembly. The second contacts can be configured to carry information other than the command and address information.

"In a particular embodiment, the microelectronic element in the first type of the microelectronic assembly can be of type DDRx. In one embodiment, the microelectronic element in the second type of the microelectronic assembly can be of type LPDDRx. In a particular example, the microelectronic element in the first type of the microelectronic assembly can be of type GDDRx. In an exemplary embodiment, a system as described above can include one or more other electronic components electrically connected to the component. In one example, the system can include a housing, the component and the one or more other electronic components being assembled with the housing.

"In accordance with another aspect of the invention, a system can include a microelectronic assembly which includes a set of terminals and a microelectronic element having a memory storage array having a given number of storage locations, the microelectronic element of the assembly having inputs connected with the terminals for receiving command and address information specifying one of the storage locations, and a component for connection with the microelectronic assembly. The component can include a support structure bearing a set of conductors configured to carry the command and address information, and a plurality of contacts coupled to the set of conductors, the contacts electrically connected with corresponding ones of the terminals of the microelectronic assembly.

"The contacts can have address and command information assignments arranged according to a first predetermined arrangement for connection with a first type of the microelectronic assembly in which the microelectronic element is configured to sample the command and address information coupled thereto through a first subset of the contacts including a first number of the contacts. The contacts can have address and command information assignments arranged according to a second predetermined arrangement for connection with a second type of the microelectronic assembly in which the microelectronic element is configured to sample the command and address information coupled thereto through a second subset of the contacts including a second number of the contacts, the first and second subsets including some contacts occupying identical positions, the second number being fewer than the first number.

"In one example, the command and address information of the first type of the microelectronic assembly can include parity information, the microelectronic element in the first type of the microelectronic assembly can be configured to sample the parity information, and the second subset of the contacts for connection with the second type of the microelectronic assembly may not be configured to sample the parity information. In an exemplary embodiment, the microelectronic element in the second type of the microelectronic assembly can be of type DDR3, and the microelectronic element in the first type of the microelectronic assembly can be of type DDR4.

"In one embodiment, the command and address information of the first type of the microelectronic assembly having the DDR4 type microelectronic element can include parity information, and the DDR4 type microelectronic element in the first type of the microelectronic assembly can be configured to sample the parity information. In a particular example, the microelectronic element in the second type of the microelectronic assembly can be of type DDRx, and the microelectronic element in the first type of the microelectronic assembly can be of type DDR(x+1)."

For more information, see this patent: Crisp, Richard Dewitt; Haba, Belgacem; Zohni, Wael. Co-Support System and Microelectronic Assembly. U.S. Patent Number 8787034, filed March 15, 2013, and published online on July 22, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8787034.PN.&OS=PN/8787034RS=PN/8787034

Keywords for this news article include: Semiconductor, Microelectronics, Invensas Corporation, Electronic Components.

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Source: Electronics Newsweekly


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