News Column

Researchers Submit Patent Application, "Circuit Board and Method of Manufacturing the Same", for Approval

July 23, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Washington, D.C., VerticalNews journalists report that a patent application by the inventors SHIN, Yee Na (Suwon, KR); LEE, Seung Eun (Sungnam, KR); CHUNG, Yul Kyo (Yongin, KR); LEE, Doo Hwan (Daejeon, KR), filed on October 28, 2013, was made available online on July 10, 2014.

The patent's assignee is Samsung Electro-mechanics Co., Ltd.

News editors obtained the following quote from the background information supplied by the inventors: "The present invention relates to a circuit board and a method of manufacturing the same.

"With the tendency for miniaturization of conductor patterns, the line width and pitch of the conductor patterns, which are respectively in contact with an upper surface and a lower surface of a via, are also continuously reduced.

"However, as disclosed in Patent Document 1 etc., the via passing through an insulating layer generally has a wide-upper and narrow-lower shape.

"Therefore, in order to miniaturize the conductor pattern formed on the surface including the upper surface of the via, the diameter of the upper surface of the via should be reduced. In order to achieve this, the diameter of the lower surface of the via also should be reduced.

"However, the smaller the lower surface of the via is, the smaller the contact area between the conductor pattern formed under the insulating layer and the lower surface of the via is. Thus, there is a problem that reductions in reliability and signal transmission capability are caused by process variation.

"Meanwhile, as disclosed in Patent Document 1 etc., techniques related to electronic component embedded circuit boards, which implement high performance as well as miniaturization and slimming of the circuit board by forming the multilayer circuit board and embedding an active device such as IC and a passive device such as an inductor or a capacitor in the circuit board, have been developed.

"In the electronic component embedded circuit board, in order to efficiently utilize performance of the electronic component, a via, a circuit pattern, etc., which electrically connect between the internal electronic component and the outside, should perform a sufficient signal transmission function.

"However, as described above, when reducing the diameter of the via for miniaturization of the circuit pattern, the entire volume of the via is also remarkably reduced and consequently current transmission performance of the via is reduced. Thus, there is a problem that the performance of the electronic component can't be sufficiently utilized when the via is connected to the electronic component of a high speed signal processing device or a high performance processor."

As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "The present invention has been invented in order to overcome the above-described problems and it is, therefore, an object of the present invention to provide a technique that can improve reliability and connectivity of a via and miniaturize a conductor pattern connected to the via.

"In accordance with one aspect of the present invention to achieve the object, there is provided a circuit board including: an insulating layer; an upper conductor pattern and a lower conductor pattern respectively provided on an upper surface and a lower surface of the insulating layer; and a via passing through the insulating layer to be in contact with the upper conductor pattern and the lower conductor pattern and having a bent portion whose cross-sectional area or diameter changes discontinuously.

"At this time, the via may include a first body in contact with the lower conductor pattern; and a second body in contact with the upper conductor pattern and having a smaller volume than the first body, wherein the first body and the second body may be formed integrally.

"Further, the bent portion may be formed on the boundary between the first body and the second body.

"Further, the insulating layer may include a first insulating portion in which the first body is formed; and a second insulating portion which is formed on the first insulating portion and in which the second body is formed.

"Here, it is preferred that the thickness of the second insulating portion is less than 0.9 times the thickness of the first insulating portion.

"Further, the second insulating portion may have a lower laser absorption rate than the first insulating portion.

"Further, the second insulating portion may have a higher chemical resistance to a desmear process solution than the first insulating portion.

"At this time, the desmear process solution may include a sodium hydroxide solution or a permanganate solution.

"Further, the first insulating portion may include PPG or ABF, and the second insulating portion may include at least one material selected from the group consisting of bisphenol A, phenolic novolac resin, silica, and TiO.sub.4.

"Further, a minimum value of the cross-sectional diameter of the second body may be smaller than the diameter of an upper surface of the via and larger than the diameter of a lower surface of the via.

"Further, the diameter or cross-sectional area of the first body and the second body may increase from the lower conductor pattern side to the upper conductor pattern side.

"At this time, an acute angle between a lower surface of the first insulating portion and a side surface of the first body may be larger than that between a lower surface of the second insulating portion and a side surface of the second body.

"Further, the diameter or cross-sectional area of the via may be maximum in the bent portion.

"In accordance with another aspect of the present invention to achieve the object, there is provided a circuit board including: a first insulating layer having a cavity; an electronic component at least partially inserted in the cavity and having an external electrode; a second insulating layer provided on the first insulating layer to cover the electronic component; a conductor pattern provided on an upper surface of the second insulating layer; and a via passing through the second insulating layer to be in contact with the conductor pattern and the external electrode and having a bent portion whose cross-sectional area or diameter changes discontinuously.

"At this time, the via may have a first body in contact with the external electrode; and a second body in contact with the conductor pattern and having a smaller volume than the first body, wherein the first body and the second body may be formed integrally.

"Further, the bent portion may be formed on the boundary between the first body and the second body.

"Further, the diameter or cross-sectional area of the via may be maximum in the bent portion.

"Further, the second insulating layer may include a first insulating portion in which the first body is formed; and a second insulating portion which is formed on the first insulating portion and in which the second body is formed.

"Here, it is preferred that the thickness of the second insulating portion is less than 0.9 times the thickness of the first insulating portion.

"Further, the second insulating portion may have a lower laser absorption rate and a higher chemical resistance to a desmear process solution than the first insulating portion.

"Further, the second insulating layers may be formed on an upper surface and a lower surface of the first insulating layer, and the conductor patterns may be formed on and under the first insulating layer in plural number.

"Further, the external electrodes may be formed on an upper surface and a lower surface of the electronic component in plural number, and the vias may be formed on and under the electronic component in plural number to be in contact with the conductor pattern and the external electrode, respectively.

"In accordance with another aspect of the present invention to achieve the object, there is provided a method of manufacturing a circuit board, including the steps of: forming a via hole in an insulating layer having a lower conductor pattern on a lower surface to expose the lower conductor pattern; forming a via by providing a conductive material in the via hole; and forming an upper conductor pattern in contact with an upper surface of the via, wherein the via may be formed to have a bent portion whose cross-sectional area or diameter changes discontinuously.

"At this time, the insulating layer may include a first insulating portion in contact with the lower conductor pattern and a second insulating portion in contact with the upper conductor pattern, and the thickness of the second insulating portion may be less than 0.9 times the thickness of the first insulating portion.

"Further, the insulating layer may include a first insulating portion in contact with the lower conductor pattern and a second insulating portion in contact with the upper conductor pattern, the step of forming the via hole may include a process of irradiating laser to the lower conductor pattern from above the second insulating portion, and the second insulating portion may have a lower laser absorption rate than the first insulating portion.

"Further, the insulating layer may include a first insulating portion in contact with the lower conductor pattern and a second insulating portion in contact with the upper conductor pattern, the step of forming the via hole may include a process of irradiating laser to the lower conductor pattern from above the second insulating portion and a process of removing a portion of the second insulating portion and a portion of the first insulating portion using a desmear process solution, and the second insulating portion may have a higher chemical resistance to the desmear process solution than the first insulating portion.

"At this time, the first insulating portion may include PPG or ABF, and the second insulating portion may include at least one material selected from the group consisting of bisphenol A, phenolic novolac resin, silica, and TiO.sub.4.

"In accordance with another aspect of the present invention to achieve the object, there is provided a method of manufacturing a circuit board, including the steps of: inserting at least a portion of an electronic component having an external electrode in a cavity provided in a first insulating layer; forming a second insulating layer on the first insulating layer to cover the electronic component; forming a via hole through the second insulating layer to expose the external electrode; forming a via by providing a conductive material in the via hole; and forming a conductor pattern in contact with an upper surface of the via, wherein the via may be formed to have a bent portion whose cross-sectional area or diameter changes discontinuously.

"At this time, the second insulating layer may have a first insulating portion in contact with the external electrode and a second insulating portion in contact with the conductor pattern, and the second insulating portion may have a lower laser absorption rate and a higher chemical resistance to a desmear process solution than the first insulating portion.

"Further, an inner layer pattern may be further provided on a surface of the first insulating layer, the first insulating portion may also cover the inner layer pattern, and in the step of forming the via hole, a via hole may be further formed to expose the inner layer pattern by passing through the second insulating portion and the first insulating portion.

BRIEF DESCRIPTION OF THE DRAWINGS

"These and/or other aspects and advantages of the present general inventive concept will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:

"FIG. 1 is a view schematically showing a circuit board in accordance with an embodiment of the present invention;

"FIG. 2 is a view schematically showing a via provided in the circuit board in accordance with an embodiment of the present invention;

"FIG. 3 is a view schematically showing a circuit board in accordance with an embodiment of the present invention;

"FIGS. 4a to 4d are process cross-sectional views schematically showing a method of manufacturing a circuit board in accordance with an embodiment of the present invention, wherein FIG. 4a is a view schematically showing the state in which a first insulating portion is provided, FIG. 4b is a view schematically showing the state in which a second insulating portion is formed, FIG. 4c is a view schematically showing the state in which a via hole is formed, and FIG. 4d is a view schematically showing the state in which a via is formed;

"FIG. 5 is a view schematically showing a circuit board in accordance with another embodiment of the present invention; and

"FIGS. 6a to 6g are process cross-sectional views schematically showing a method of manufacturing a circuit board in accordance with another embodiment of the present invention, wherein FIG. 6a is a view schematically showing the state in which a first insulating layer having a cavity is provided, FIG. 6b is a view schematically showing the state in which an electronic component is inserted in the cavity, FIG. 6c is a view schematically showing the state in which a first insulating portion is formed, FIG. 6d is a view schematically showing the state in which a second insulating portion is formed, FIG. 6e is a view schematically showing the state in which a second insulating layer including a first insulating portion and a second insulating portion is formed under the first insulating layer, FIG. 6f is a view schematically showing the state in which a via hole is formed, and FIG. 6g is a view schematically showing the state in which a via and a conductor pattern are formed."

For additional information on this patent application, see: SHIN, Yee Na; LEE, Seung Eun; CHUNG, Yul Kyo; LEE, Doo Hwan. Circuit Board and Method of Manufacturing the Same. Filed October 28, 2013 and posted July 10, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=7006&p=141&f=G&l=50&d=PG01&S1=20140703.PD.&OS=PD/20140703&RS=PD/20140703

Keywords for this news article include: Electronics, Circuit Board, Microtechnology, Samsung Electro-mechanics Co. Ltd.

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Source: Electronics Newsweekly


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