News Column

Patent Issued for Driving Device for Liquid Crystal Display

July 23, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- A patent by the inventors Cheng, Tung-Shuan (Tainan, TW); Liu, Yueh-Hsiu (Hsinchu, TW); Han, Kai-Shu (Hsinchu, TW), filed on October 1, 2013, was published online on July 8, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8773346 is assigned to NOVATEK Microelectronics Corp. (Hsinchu Science Park, Hsin-Chu, TW).

The following quote was obtained by the news editors from the background information supplied by the inventors: "The present invention relates to a driving device for a liquid crystal display, and more particularly, to a driving device utilized for preventing noises of a clock signal from causing error operation of a liquid crystal display.

"In a driving circuit of a liquid crystal display (LCD), a shift register is a widely employed digital logic circuit, and can sequentially provide a pulse signal to a plurality of data output terminals according to a clock signal, such that the driving circuit of the LCD can output source driving signals or gate driving signals line-by-line to drive corresponding pixels.

"Please refer to FIG. 1. FIG. 1 is a functional block diagram of a gate driving circuit 10 of a conventional LCD. The gate driving circuit 10 mainly includes a shift register circuit 110 and an output buffer circuit 120. The shift register circuit 110 sequentially outputs pulse signals Q1.about.Qn according to an input pulse signal DIN and a clock signal CLK. The output buffer 120 then performs operations such as voltage amplification on the pulse signals Q1.about.Qn to generate gate driving signals X1.about.Xn for respective scan lines. In addition, the gate driving circuit 10 further includes an output control circuit 130. The output control circuit 130 is utilized for modulating the pulse signals Q1.about.Qn to avoid the adjacent gate driving signals X1.about.Xn overlapping with each other according to an Output Enable (OE) signal. Detailed operations of the driving circuit are well known by those skilled in the art, and thus not further described herein.

"Generally, the shift register is formed by a plurality of series connected flip-flops, and can perform operations such as data registering, delay or conversion of serial and parallel output on input binary data. Please refer to FIG. 2. FIG. 2 is a schematic diagram of a conventional shift register circuit 20. The shift register circuit 20 can be the shift register 110 in FIG. 1, and includes cascaded flip-flops FF1.about.FFn. Each of the flip-flops FF1.about.FFn further includes an input terminal D, an output terminal Q and a clock input terminal C, and is utilized for shifting a logic level received by the input terminal D to the output terminal Q according to a clock signal CLK received by the clock input terminal C. In common cases, the output terminal of each flip-flop is coupled to the input terminal of a next stage flip-flop. Thus, when an input signal DIN is inputted to the input terminal of the first flip-flop FF1, the shift register circuit 20 then forward transfers a logic level of the input signal DIN stage-by-stage according to the clock signal CLK, so as to output pulse signals Q1.about.Qn in order. Related signal sequence of the shift register circuit 20 is shown in FIG. 3.

"Please further refer to FIG. 4. FIG. 4 is a schematic diagram of a conventional flip-flop circuit 40. As shown in FIG. 4, the flip-flop circuit 40 generally includes two stages of latch circuit 41 and 42. When the clock signal CLK is logic low, the flip-flop circuit 40 stores the logic level of the input signal DIN into the first stage latch 41, and the second stage latch 42 is disabled. However, when the clock signal CLK is converted from logic low to logic high, the first stage latch 41 is then disabled while the second stage latch 42 is activated to output data stored by the first stage latch 41. In such a situation, when unexpected impulses exist in the clock signal CLK that caused by noise interference, the shift register circuit 20 is liable to operate in error.

"For example, please refer to FIG. 5. FIG. 5 illustrates how noise interference causes error operation of a conventional shift register. As shown in FIG. 5, when the clock signal CLK has a downward unexpected impulse, each flip-flop of the shift register may perform data latch and output operation according to the error noise impulse, causing the shift register to output incorrect pulse signals. However, since the LCD panel needs to rely on a variety of signals for operation, coupling effects between signals, such as electromagnetic coupling for example, often induce noises to the clock signal of the driving circuit, causing the shift register to operate in error, so as to abnormally display images on the LCD panel.

"Therefore, how to prevent the clock signal from noise interference is an important issue when designing the driving circuit of the LCD."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "It is therefore an objective of the present invention to provide a driving device for a liquid crystal display.

"According to the present invention, a driving device for a liquid crystal display is disclosed. The driving device includes a shift register, a reception terminal, a noise elimination circuit and a control signal generation circuit. The reception terminal is utilized for receiving a first clock signal. The noise elimination circuit is coupled to the reception terminal, and is utilized for eliminating noises of the first clock signal and delaying the first clock signal a preset time to generate a second clock signal. The noise elimination circuit includes a filtering circuit and a comparator. The filtering circuit is coupled to the reception terminal for performing a filtering operation on the first clock signal to eliminate the noises of the first clock signal. The comparator is coupled to the filtering circuit for comparing a filtering result of the first clock signal with a threshold voltage to generate the second clock signal. The second clock signal is logic high when the filtering result of the first clock signal is greater than the threshold voltage, and is logic low when the filtering result of the first clock is smaller than the threshold voltage. The control signal generation circuit is coupled to the reception terminal, the noise elimination circuit and the shift register, and is utilized for generating a first control signal and a second control signal to control the shift register according to the first clock signal and the second clock signal.

"According to the present invention, a driving device for a liquid crystal display is further disclosed. The driving device includes a shift register, a reception terminal, a noise elimination circuit, a pulse width modulator and a control signal generation circuit. The reception terminal is utilized for receiving a first clock signal. The noise elimination circuit is coupled to the reception terminal, and is utilized for eliminating noises of the first clock signal and delaying the first clock signal a preset time to generate a second clock signal. The pulse width modulator is coupled to the noise elimination circuit, and is utilized for modulating pulse width of the second clock signal to generate a third clock signal. The noise elimination circuit includes a filtering circuit and a comparator. The filtering circuit is coupled to the reception terminal for performing a filtering operation on the first clock signal to eliminate the noises of the first clock signal. The comparator is coupled to the filtering circuit for comparing a filtering result of the first clock signal with a threshold voltage to generate the second clock signal. The second clock signal is logic high when the filtering result of the first clock signal is greater than the threshold voltage, and is logic low when the filtering result of the first clock is smaller than the threshold voltage. The control signal generation circuit is coupled to the reception terminal, the pulse width modulator and the shift register, and is utilized for generating a first control signal and a second control signal to control the shift register according to the first clock signal and the third clock signal.

"According to the present invention, a driving device for a liquid crystal display is further disclosed. The driving device includes a shift register, a reception terminal, a noise elimination circuit and a control signal generation circuit. The reception terminal is utilized for receiving a first clock signal. The noise elimination circuit is coupled to the reception terminal, and is utilized for eliminating noises of the first clock signal and delaying the first clock signal a preset time to generate a second clock signal. The noise elimination circuit includes a filtering circuit and a comparator. The filtering circuit is coupled to the reception terminal for performing a filtering operation on the first clock signal to eliminate the noises of the first clock signal. The comparator is coupled to the filtering circuit for comparing a filtering result of the first clock signal with a threshold voltage to generate the second clock signal. The second clock signal is logic high when the filtering result of the first clock signal is greater than the threshold voltage, and is logic low when the filtering result of the first clock is smaller than the threshold voltage. The control signal generation circuit is coupled to the reception terminal, the noise elimination circuit and the shift register, and is utilized for generating a first control signal according to the first clock signal and an Output Enable (OE) signal and generating a second control signal according to the first clock signal and the second clock signal, wherein the OE signal is utilized for modulating output signals of the driving device to avoid overlap of the adjacent output signals and the first control signal and the second control signal is utilized for controlling the shift register.

"These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings."

URL and more information on this patent, see: Cheng, Tung-Shuan; Liu, Yueh-Hsiu; Han, Kai-Shu. Driving Device for Liquid Crystal Display. U.S. Patent Number 8773346, filed October 1, 2013, and published online on July 8, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8773346.PN.&OS=PN/8773346RS=PN/8773346

Keywords for this news article include: NOVATEK Microelectronics Corp.

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Source: Electronics Newsweekly


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