News Column

Patent Issued for Direct Memory Access (DMA) Controlled Medical Devices

July 21, 2014



By a News Reporter-Staff News Editor at Pain & Central Nervous System Week -- A patent by the inventor Sherman, Neil S. (San Bruno, CA), filed on July 30, 2013, was published online on July 8, 2014, according to news reporting originating from Alexandria, Virginia, by NewsRx correspondents (see also Spinal Modulation, Inc.).

Patent number 8774931 is assigned to Spinal Modulation, Inc. (Menlo Park, CA).

The following quote was obtained by the news editors from the background information supplied by the inventors: "Neurostimulation has become an accepted treatment for patients with chronic pain in their back and/or limbs who have not found pain relief from other treatments. In general, neurostimulation comprises applying an electrical current to nerve tissue in the pathway of the chronic pain. This creates a sensation that blocks the brain's ability to sense the previously perceived pain. There are two conventional forms of electrical stimulation commonly used to treat chronic pain: Spinal Cord Stimulation (SCS) and Peripheral Nerve Field Stimulation (PNFS). In SCS, electrical leads are placed along the spinal cord. A programmable implantable neurostimulator (INS) is implanted in the upper buttock or abdomen (under the skin) which emits electrical currents to the spinal cord via electrodes of the leads. Peripheral nerve field stimulation is similar to spinal cord stimulation, however peripheral nerve field stimulation involves placing the leads just under the skin in an area near to the peripheral nerves involved in pain.

"A programmable INS requires circuitry for controlling the myriad of functions that are generally required to perform neurostimulation and a battery for powering such circuitry, as well as for providing the power necessary for generating neurostimulation signals. For example, a programmable INS can include an application specific integrated circuit (ASIC) for controlling the myriad of functions. However, an ASIC is relatively expensive to design, and typically requires a significant redesign whenever features are changed and/or added. For another example, a programmable INS can include an off-the-shelf central processing unit (CPU) that can be used to control the myriad of functions. This is beneficial because it provides for an off-the-shelf solution. However, if the CPU is not used in a power efficient manner, the use of the CPU can consume significantly more power than is practical, especially considering the desire to minimize the power consumed by the INS to thereby extend the useful life of the INS."

In addition to the background information obtained for this patent, NewsRx journalists also obtained the inventor's summary information for this patent: "Specific embodiments of the present invention generally relate to implantable stimulation systems, and methods for use therewith, that include direct memory access (DMA) controlled stimulation.

"In accordance with an embodiment, an implantable stimulation system (e.g., an implantable neurostimulation system (INS)), comprises memory including a first table and a second table. The first table stores blocks of stimulation event data corresponding to stimulation events that are to be performed during a period of time (e.g., a 0.5 sec. or 1 sec. period of time). The second table stores blocks of next stimulation event time data corresponding to the period of time. The implantable stimulation system also includes a direct memory access (DMA) controller including a first DMA channel and a second DMA channel. The first DMA channel selectively transfers one of the blocks stimulation event data from the first table to one or more registers that are used to control stimulation events. In this manner, the DMA controller can be used to control stimulation events. Such one or more registers that are used to control the stimulation events can correspond to I/O ports of a microcontroller unit (MCU) that includes the DMA controller and the memory.

"The second DMA channel selectively transfers one of the blocks of next stimulation event time data from the second table to a timer that is used to control timing associated with the stimulation events.

"The implantable stimulation system also comprises a timer including a count register and a first compare register. Each of the blocks of next stimulation event time data comprises a value, which when transferred by the second DMA channel to the timer is stored in the first compare register of the timer. The count register of the timer stores a count value and increments the count value in dependence on a clock signal. The first compare register compares the value stored in the first compare register to the count value of the count register, and generates a first trigger when the value stored in the first compare register equals the count value of the count register. The first DMA channel transfers a next block of the stimulation event data from the first table to the one or more registers that are used to control stimulation events in dependence on the first trigger generated by the first compare register.

"The second DMA channel transfers a next block of the next stimulation event time data from the second table to the first compare register in dependence on the first trigger signal generated by the first compare register, a trigger signal generated in response to the first DMA channel starting a transfer, or a trigger signal generated in response to the first DMA channel completing a transfer.

"In an embodiment, the timer also includes a second compare register that stores a reset value. The timer compares the reset value to the count value of the count register. When the stored reset value equals the count value of the count register, the count value of the count register is reset.

"In accordance with an embodiment, each of the blocks of stimulation event data corresponds to a stimulation event and includes at least a first group of bits and a second group of bits. The first group of bits specify which one of a plurality of leads, if any, is selected for the stimulation event. The second group of bits specify how the electrodes of a selected lead are connected during the stimulation event. In an embodiment, the first group of bits are transferred by the first DMA channel to a first portion of the one or more registers that correspond to I/O ports connected to circuitry that controls lead selection. Simultaneously, the second group of bits are transferred by the first DMA channel to a second portion of the one or more registers that correspond to I/O ports connected to circuitry that controls electrode configuration.

"In accordance with an embodiment, the implantable stimulation system also includes a central processing unit (CPU). The CPU receives or otherwise accesses neurostimulation data that defines neurostimulation signals to be delivered via one or more leads. Based on the neurostimulation data, the CPU generates the first and second tables that are stored in the memory. After the CPU generates the first and second tables, the DMA controller controls the stimulation events for the period of time (e.g., 0.5 sec. or 1 sec.) without CPU intervention, thereby enabling the CPU to perform other tasks unrelated to performing the stimulation events and/or to enter a low-power mode during the period of time.

"In accordance with an embodiment, the CPU identifies potential pulse collisions based on the neurostimulation data, and the CPU generates the first and second tables so that the identified potential pulse collisions are avoided when the DMA controller controls the stimulation events for the period of time in dependence on the first and second tables.

"In accordance with an embodiment, the implantable stimulation system includes a first clock circuit and a second clock circuit, wherein the second clock circuit generates a higher frequency clock signal than the first clock circuit, which results in the second clock circuit consuming more power than the first clock circuit. The clock signal generated by the first clock circuit can, e.g., be used by the count register (of the timer) to increment the count value. The higher frequency clock signal generated by the second clock circuit is used by the CPU when the CPU is not in the low-power mode, and/or may be used by the count register to increment the count value. In accordance with an embodiment, in order to conserve power, if the clock signal generated by the lower power second clock circuit is used to increment the count register, then the first clock circuit is at least partially disabled when the CPU is in the low-power mode.

"In accordance with an embodiment, based on the neurostimulation data received or otherwise accessed by the CPU, the CPU can determine whether the clock signal generated by the first clock circuit has sufficient resolution to be used as the clock signal that the count register (of the timer) uses to increment the count value, or whether the clock signal generated by the second clock circuit needs to be used as the clock signal that the count register uses to increment the count value. If the clock signal generated by the first clock circuit has sufficient resolution, then the clock signal generated by the first clock circuit is used and the second clock circuit can be at least partially disabled. If on the other hand the higher frequency clock signal generated by the second clock circuit needs to be used, then the clock signal generated by the second clock circuit is used, and the lower frequency first clock circuit can be at least partially disabled. Additionally, the first and second tables are generated by the CPU in dependence on whether the clock signal having the first frequency or the clock signal having the second frequency is used as the clock signal that increments the count register.

"This summary is not intended to summarize all of the embodiments of the present invention. Further and alternative embodiments, and the features, aspects, and advantages of the embodiments of invention will become more apparent from the detailed description set forth below, the drawings and the claims."

URL and more information on this patent, see: Sherman, Neil S.. Direct Memory Access (DMA) Controlled Medical Devices. U.S. Patent Number 8774931, filed July 30, 2013, and published online on July 8, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8774931.PN.&OS=PN/8774931RS=PN/8774931

Keywords for this news article include: Spinal Cord, Chronic Pain, Spinal Modulation Inc, Central Nervous System, Nervous System Diseases, Neurologic Manifestations.

Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2014, NewsRx LLC


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Source: Pain & Central Nervous System Week


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