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Patent Issued for Capacitive Load Drive Circuit, Fluid Ejection Device and Medical Device

July 25, 2014



By a News Reporter-Staff News Editor at Energy Weekly News -- A patent by the inventors Tabata, Kunio (Shiojiri, JP); Oshima, Atsushi (Shiojiri, JP); Yoshino, Hiroyuki (Suwa, JP); Ide, Noritaka (Shiojiri, JP), filed on March 15, 2012, was published online on July 8, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8773098 is assigned to Seiko Epson Corporation (Tokyo, JP).

The following quote was obtained by the news editors from the background information supplied by the inventors: "The present invention relates to a technique which applies a drive signal to drive a capacitive load such as a piezoelectric element.

"Most of piezoelectric elements are driven by a predetermined drive signal applied thereto, as in an ejection head which is mounted to an ink jet printer, or the like. In general, such a piezoelectric element is driven by a drive signal generated by power-amplifying a drive waveform signal.

"As a method of generating the drive signal by power-amplifying the drive waveform signal, a method of using a digital power amplifier has been proposed which is different from a method of using an analog power amplifier. The method of using the digital power amplifier can perform the power amplification with small power loss and can be easily made smaller, compared with the method of using an analog power amplifier (for example, JP-A-2005-329710). In order to generate the drive signal using the digital power amplifier, firstly, the drive wavelength signal is pulse-modulated to be converted into a modulated signal of a pulse waveform. Then, the obtained modulated signal is power-amplified by the digital power amplifier to be converted an amplified digital signal. Thereafter, modulated components included in the amplified digital signal are removed by a low pass filter, to thereby generate the power-amplified drive signal.

"Further, most of drive signals include a period in which a voltage value is not changed. Since the piezoelectric element to which the drive signal is applied is a capacitive load, it is not necessary to supply electric power in the period in which the voltage value of the drive signal is not changed. In other words, operation of the digital power amplifier in this period becomes wasteful. In this regard, a technique has been proposed in which the operation of the digital power amplifier is stopped in the period in which the voltage value of the drive signal is not changed to further reduce power loss in generation of the drive signal (JP-A-2011-005733).

"However, the previously proposed technique has a problem that the voltage value of the drive signal may be changed when the operation of the digital power amplifier is stopped. If the voltage value is changed in the period in which the voltage value of the drive signal should be constant, it is difficult to drive the capacitive load such as a piezoelectric element with high accuracy."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "An advantage of some aspects of the invention is to provide a technique which is capable of stopping operation of a digital power amplifier without changing a voltage value of a drive signal in a period in which the voltage value is to be a constant value to drive a capacitive load with high accuracy and to effectively reduce power loss.

"An aspect of the invention is directed to a capacitive load drive circuit which applies a predetermined drive signal to drive a capacitive load, including: a drive waveform generator which generates a drive waveform signal which is a reference of the drive signal; a modulator which pulse-modulates the drive waveform signal to generate a modulated signal in which a first voltage state and a second voltage state which is lower in voltage than the first voltage state are repeated; a digital power amplifier which power-amplifies the modulated signal to generate an amplified digital signal; a low pass filter which smoothes the amplified digital signal to generate the drive signal to be applied to the capacitive load; and a power amplification stopping section which stops operation of the digital power amplifier in a signal invariable period which is a period in which the drive waveform signal is to be a constant value, wherein in the signal invariable period, a power amplification stopping section stops an operation of the digital power amplifier, either when half a period of time when the modulated signal in the first voltage state maintains the first voltage state elapses or when half a period of time when the modulated signal in the second voltage state maintains the second voltage state elapses.

"In this capacitive load drive circuit, the drive waveform signal generated in the drive waveform signal generation circuit may be pulse-modulated to be converted into the modulated signal. Further, the modulated signal is power-amplified and is then smoothed by the low pass filter, to thereby generate the drive signal. Here, in the capacitive load such as a piezoelectric element, voltage in which the load corresponds to an accumulated electric charge amount is expressed as voltage between terminals. Thus, when the voltage value of the applied drive signal is not changed, even though the capacitive load is separated from the drive circuit, the capacitive load is maintained in a state where the drive signal is applied. Thus, in the period in which the voltage value of the drive signal is not changed (that is, in the signal invariable period in which the voltage value of the drive waveform signal is not changed), the power amplification in the digital power amplifier is stopped at the following timing. That is, the power amplification in the digital power amplifier is stopped either at a timing when half the period of time when the modulated signal in the first voltage state maintains the first voltage state elapses or at a timing when half the period of time when the modulated signal in the second voltage state maintains the second voltage state elapses.

"Although described later in detail, the inventors of the present application have found that the phenomenon that voltage fluctuation overlaps with the drive signal when the power amplification in the digital power amplifier is stopped is caused by the fact that electric current flows in the low pass filter even in the period (signal invariable period) in which the voltage value of the drive signal is constant. Further, in the signal invariable period, the electric current flowing in the low pass filter becomes zero either when half the period of time when the modulated signal in the first voltage state maintains the first voltage state elapses or when half the period of time when the modulated signal in the second voltage state maintains the second voltage state elapses. Thus, if the operation of the digital power amplifier is stopped at this time (or in the vicinity of this time), it is possible to stop the power amplification of the digital power amplifier without generation of the voltage fluctuation in the drive signal, and to avoid generation of power loss according to the power amplification.

"Further, in the capacitive load drive circuit of the invention as described above, whether the operation of the digital power amplifier is stopped when half the period of time when the modulated signal in the first voltage state maintains the first voltage state elapses or when half the period of time when the modulated signal in the second voltage state maintains the second voltage state elapses may be determined according to the following switching. That is, when the signal invariable period starts, in a case where the period of time when the modulated signal maintains the second voltage state is longer than the period of time when the modulated signal maintains the first voltage state, the operation of the digital power amplifier is stopped when half the period of time when the modulated signal in the first voltage state maintains the first voltage state elapses. On the other hand, when the signal invariable period starts, in a case where the period of time when the modulated signal maintains the second voltage state is shorter than the period of time when the modulated signal maintains the first voltage state, the operation of the digital power amplifier may be stopped when half the period of time when the modulated signal in the second voltage state maintains the second voltage state elapses.

"Since electric current flows in the low pass filter even in the signal invariable period, strictly speaking, the voltage value of the drive signal applied to the capacitive load is changed. Further, if the power amplification in the digital power amplifier is stopped in the signal invariable period, strictly, the drive signal of which the voltage value is changed is fixed at a voltage value at that time point. The voltage value fixed in this way does not necessarily coincide with a voltage value to be applied to the capacitive load according to the drive waveform signal, which causes a voltage difference. This voltage difference is changed as follows, according to conditions when the power amplification in the digital power amplifier is stopped (when the signal invariable period starts). That is, in a case where the signal invariable period starts under the condition that the period of time when the modulated signal maintains the second voltage state is longer than the period of time when the modulated signal maintains the first voltage state, the voltage difference at the time point when half the period of time when the modulated signal maintains the first voltage state elapses becomes smaller than the voltage difference at the time point when half the period of time when the modulated signal maintains the second voltage state elapses. Reversely, in a case where the signal invariable period starts under the condition that the period of time when the modulated signal maintains the second voltage state is shorter than the period of time when the modulated signal maintains the first voltage state, the voltage difference at the time point when half the period of time when the modulated signal maintains the second voltage state elapses becomes smaller than the voltage difference at the time point when half the period of time when the modulated signal maintains the first voltage state elapses. Thus, when the signal invariable period starts, in a case where the period of time when the modulated signal maintains the second voltage state is longer than the period of time when the modulated signal maintains the first voltage state, by stopping the operation of the digital power amplifier at the time point when half the period of time when the modulated signal maintains the first voltage state elapses, and reversely, in a case where the period of time when the modulated signal maintains the second voltage state is shorter than the period of time when the modulated signal maintains the first voltage state, by stopping the operation of the digital power amplifier at the time point when half the period of time when the modulated signal maintains the second voltage state elapses, it is possible to apply a drive signal having a small voltage difference with respect to the voltage value to be applied to the capacitive load.

"Further, the capacitive load drive circuit of the invention as described above may be mounted to a fluid ejection device.

"With this configuration, it is possible to suppress loss of electric power for driving the fluid ejection device. Further, since the voltage fluctuation does not overlap with the drive signal, it is possible to eject a fluid with high accuracy."

URL and more information on this patent, see: Tabata, Kunio; Oshima, Atsushi; Yoshino, Hiroyuki; Ide, Noritaka. Capacitive Load Drive Circuit, Fluid Ejection Device and Medical Device. U.S. Patent Number 8773098, filed March 15, 2012, and published online on July 8, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8773098.PN.&OS=PN/8773098RS=PN/8773098

Keywords for this news article include: Energy, Electric Power, Seiko Epson Corporation.

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Source: Energy Weekly News


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