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Patent Issued for Array Substrate Structure of Display Panel and Method of Making the Same

July 23, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- AU Optronics Corp. (Science-Based Industrial Park, Hsin-Chu, TW) has been issued patent number 8772780, according to news reporting originating out of Alexandria, Virginia, by VerticalNews editors.

The patent's inventors are Huang, Kuo-Yu (Hsin-Chu, TW); Huang, Te-Chun (Hsin-Chu, TW).

This patent was filed on September 11, 2012 and was published online on July 8, 2014.

From the background information supplied by the inventors, news correspondents obtained the following quote: "The present invention relates to an array substrate structure of a display panel and method of making the same, and more particularly, to an array structure of a display panel and the method of making the same that is able to prevent wirings in the wiring region from being damaged during fabricating process.

"A substrate of an array substrate structure of a display panel is typically defined to a display region, a wiring region, and a pad region. Gate lines, data lines, pixel arrays, and thin film transistors (TFTs) are disposed in the display region. Wirings for electrically connecting the gate lines and the data lines to the pad region are disposed in the wiring region. And the pad region provides electrical connection between the gate lines/the data lines and a driving chip or a circuit board. Accordingly, driving signals from the driving chip or the circuit board are provided to the gate lines and the data lines through the wirings.

"Conventionally, etching processes for defining conductive layers, semiconductor layers, dielectric layers, and protecting layers are required for fabricating the array substrate structure of the display panel. However, it is found that the pre-layer exposed by the specific material layer being etched is unavoidably damaged. For example, the wirings under the protecting layer are often damaged during etching the protecting layer. Consequently, yield of the array substrate structure of the display panel is adversely impacted and thus cannot be improved."

Supplementing the background information on this patent, VerticalNews reporters also obtained the inventors' summary information for this patent: "It is therefore one of the objectives of the present invention to provide an array substrate structure of a display panel and method of making the same to improve yield and reliability of the array substrate structure of the display panel.

"According to a preferred embodiment, a method for forming an array substrate structure of a display panel is provided. A substrate having a display region and a wiring region defined thereon is provided. A first patterned conductive layer is formed on the substrate, wherein the first patterned conductive layer includes a plurality of gate lines, a plurality of gate electrodes, and a plurality of first gate tracking lines. The gate lines are disposed in the display region, the gate electrodes are disposed in the display region, and the first gate tracking lines are disposed in the wiring region. The first gate tracking lines are electrically connected to a portion of the gate lines. A first patterned insulating layer is formed on the first patterned conductive layer, wherein the first patterned insulating layer has a plurality of first contact holes respectively exposing a portion of the gate lines. A second patterned conductive layer is formed on the first patterned insulating layer, and the second patterned conductive layer comprises a plurality of data lines, a plurality of source electrodes, a plurality of drain electrodes, and a plurality of second gate tracking lines. The data lines are disposed in the display region, the source electrodes and the drain electrodes are disposed in the display region, and the second gate tracking lines are electrically connected to the exposed gate lines through the first contact holes. A patterned semiconductor layer and a second patterned insulating layer are formed on the second patterned conductive layer. The patterned semiconductor layer includes a plurality of semiconductor channel layers and a plurality of first protective patterns, wherein the semiconductor channel layers are disposed in the display region and respectively disposed on the corresponding gate electrodes, and at least a portion of the first protective patterns are disposed in the wiring region and disposed on the corresponding second gate tracking lines. The second patterned insulating layer includes a plurality of channel protective layers and a plurality of second protective patterns, wherein the channel protective layers are disposed in the display region and disposed on the corresponding semiconductor channel layers, and at least a portion of the second protective patterns are disposed in the wiring region and respectively disposed on the corresponding the first protective patterns. A first patterned protective layer and a second patterned protective layer are formed on the second patterned conductive layer, wherein the first patterned protective layer and the second patterned protective layer expose each of the second protective patterns, and the first patterned protective layer and the second patterned protective layer have a plurality of second contact holes respectively exposing the drain electrodes. A first patterned transparent conductive layer is formed on the second patterned protective layer.

"According to another preferred embodiment of the present invention, an array substrate structure of a display panel is provided. The array substrate structure of the display panel includes a substrate, a plurality of first wirings, a first patterned insulating layer, a plurality of second wirings, a plurality of first protective patterns, and a plurality of second protective patterns. The substrate includes a wiring region. The first wirings are disposed in the wiring region, the first patterned insulating layer is disposed on the first wirings, and the second wirings are disposed on the first patterned insulating layer. The first protective patterns are disposed in the wiring region and respectively disposed on the corresponding second wirings, wherein each of the first protective patterns includes a semiconductor material. The second protective patterns are disposed in the wiring region and respectively disposed on the corresponding first protective patterns, wherein each of the second protective patterns includes an inorganic insulating material.

"These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings."

For the URL and additional information on this patent, see: Huang, Kuo-Yu; Huang, Te-Chun. Array Substrate Structure of Display Panel and Method of Making the Same. U.S. Patent Number 8772780, filed September 11, 2012, and published online on July 8, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8772780.PN.&OS=PN/8772780RS=PN/8772780

Keywords for this news article include: Electronics, Circuit Board, Semiconductor, AU Optronics Corp..

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Source: Electronics Newsweekly


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