News Column

Patent Application Titled "Multilayer Ceramic Capacitor and Mounting Board Therefor" Published Online

July 23, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- According to news reporting originating from Washington, D.C., by VerticalNews journalists, a patent application by the inventors AHN, Young Ghyu (Suwon, KR); KIM, Doo Young (Suwon, KR); PARK, Min Cheol (Suwon, KR); LEE, Byoung Hwa (Suwon, KR); PARK, Sang Soo (Suwon, KR), filed on July 16, 2013, was made available online on July 10, 2014.

The assignee for this patent application is Samsung Electro-mechanics Co., Ltd.

Reporters obtained the following quote from the background information supplied by the inventors: "The present invention relates to a multilayer ceramic capacitor and a mounting board having a multilayer ceramic capacitor mounted thereon.

"A multilayer ceramic capacitor, a multilayer chip electronic component, is a chip type condenser commonly mounted on printed circuit boards of various electronic products, such as image display devices including a liquid crystal display (LCD), a plasma display panel (PDP) and the like, a computer, a personal digital assistant (PDA), a mobile phone, and the like, and provided for the charging or discharging of electricity.

"Multilayer ceramic capacitors (MLCCs) may be used as components of various electronic products due to having the advantages of a small size, high capacitance, and ease of mounting.

"The multilayer ceramic capacitor may have a structure in which a plurality of dielectric layers and a plurality of internal electrodes having different polarities and provided between the dielectric layers are alternately laminated with each other.

"However, since these dielectric layers have piezoelectricity properties and electrostrictive properties, a piezoelectric phenomenon may occur and thus cause vibrations among the internal electrodes when AC or DC voltage is applied to the multilayer ceramic capacitor.

"Such vibrations maybe transferred to a printed circuit board on which the multilayer ceramic capacitor is mounted, through external electrodes of the multilayer ceramic capacitor, and the entire printed circuit board may become an acoustic reflection surface, generating vibrating sound as noise.

"The vibrating sound may correspond to an audible frequency range of 20 to 20000 Hz, a frequency which may cause listener discomfort and which is known as acoustic noise. Studies into the reduction of such acoustic noise are needed.

"Patent Document 1 below discloses a multilayer ceramic capacitor in which a lower cover layer has a greater thickness than an upper cover layer and external electrodes are formed on both end surfaces of the ceramic body."

In addition to obtaining background information on this patent application, VerticalNews editors also obtained the inventors' summary information for this patent application: "An aspect of the present invention provides a multilayer ceramic capacitor capable of reducing noise generated due to vibrations caused by a piezoelectric effect.

"According to an aspect of the present invention, there is provided a multilayer ceramic capacitor, including: a ceramic body having a plurality of dielectric layers laminated in a thickness direction thereof, the plurality of dielectric layers having a greater width than a length; an active layer in which capacitance is formed, by including a plurality of first and second internal electrodes laminated in the thickness direction so as to be alternately exposed to both end surfaces of the ceramic body opposite to each other in a length direction of the ceramic body while having the dielectric layer interposed therebetween; an upper cover layer formed above the active layer; a lower cover layer formed below the active layer, the lower cover layer having a greater thickness than the upper cover layer; and first and second external electrodes covering the both end surfaces of the ceramic body, wherein, when half of an overall thickness of the ceramic body is denoted by A, a thickness of the lower cover layer is denoted by B, half of an overall thickness of the active layer is denoted by C, and a thickness of the upper cover layer is denoted by D, a ratio of deviation of a center of the active layer from a center of the ceramic body, (B+C)/A, satisfies 1.042.ltoreq.(B+C)/A.ltoreq.1.537.

"Here, a ratio of the thickness D of the upper cover layer to the thickness B of the lower cover layer, D/B, may satisfy 0.048.ltoreq.D/B.ltoreq.0.565.

"Here, a ratio of the thickness B of the lower cover layer to half A of the overall thickness of the ceramic body, B/A, may satisfy 0.601.ltoreq.B/A.ltoreq.1.128.

"Here, a ratio of half C of the overall thickness of the active layer to the thickness B of the lower cover layer, C/B, may satisfy 0.362.ltoreq.C/B.ltoreq.1.092.

"Here, a point of inflection formed on the both end surfaces of the ceramic body may be formed at a height equal to that of a center of the thickness of the ceramic body or therebelow, due to a difference between a deformation rate occurring in the center of the active layer and a deformation rate occurring in the lower cover layer when voltage is applied thereto.

"According to another aspect of the present invention, there is provided a mounting board for a multilayer ceramic capacitor, the mounting board including: a printed circuit board having first and second electrode pads formed thereon; and a multilayer ceramic capacitor mounted on the printed circuit board, wherein the multilayer ceramic capacitor includes a ceramic body having a plurality of dielectric layers in a thickness direction thereof, the dielectric layer having a greater width than a length; an active layer in which capacitance is formed, by including a plurality of first and second internal electrodes laminated in the thickness direction so as to be alternately exposed to both end surfaces of the ceramic body opposite to each other in a length direction of the ceramic body while having the dielectric layer interposed therebetween; an upper cover layer formed above the active layer; a lower cover layer formed below the active layer, the lower cover layer having a greater thickness than the upper cover layer; and first and second external electrodes covering the both end surfaces of the ceramic body and connected to the first and second electrode pads through a soldering, when half of an overall thickness of the ceramic body is denoted by A, a thickness of the lower cover layer is denoted by B, half of an overall thickness of the active layer is denoted by C, and a thickness of the upper cover layer is denoted by D, a ratio of deviation of a center of the active layer from a center of the ceramic body, (B+C)/A, satisfies 1.042.ltoreq.(B+C)/A.ltoreq.1.537.

"Here, a point of inflection formed on the both end surfaces of the ceramic body may be formed at a height equal to that of the soldering or therebelow, due to a difference between a deformation rate occurring in the center of the active layer and a deformation rate occurring in the lower cover layer when voltage is applied thereto.

BRIEF DESCRIPTION OF THE DRAWINGS

"The above and other aspects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

"FIG. 1 is a perspective view schematically showing a multilayer ceramic capacitor according to an embodiment of the present invention of which a portion thereof is cut;

"FIG. 2 is a cross-sectional view showing the multilayer ceramic capacitor of FIG. 1, cut in a length direction thereof;

"FIG. 3 is a cross-sectional view schematically showing the multilayer ceramic capacitor of FIG. 1, cut in the length direction thereof, to illustrate dimensional relationships among elements included in the multilayer ceramic capacitor;

"FIG. 4 is a perspective view showing a state in which the multilayer ceramic capacitor of FIG. 1 is mounted on a printed circuit board;

"FIG. 5 is a cross-sectional view showing the multilayer ceramic capacitor and the printed circuit board of FIG. 4, cut in the length direction thereof; and

"FIG. 6 is a cross-sectional view schematically showing deformation of the multilayer ceramic capacitor of FIG. 4 when voltage is applied thereto in a state in which the multilayer ceramic capacitor is mounted on the printed circuit board."

For more information, see this patent application: AHN, Young Ghyu; KIM, Doo Young; PARK, Min Cheol; LEE, Byoung Hwa; PARK, Sang Soo. Multilayer Ceramic Capacitor and Mounting Board Therefor. Filed July 16, 2013 and posted July 10, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=4738&p=95&f=G&l=50&d=PG01&S1=20140703.PD.&OS=PD/20140703&RS=PD/20140703

Keywords for this news article include: Electronics, Circuit Board, Samsung Electro-mechanics Co. Ltd.

Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2014, NewsRx LLC


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Source: Electronics Newsweekly


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