News Column

Patent Issued for Methods and Apparatuses for Performing Wafer Level Characterization of a Plasmon Element

July 2, 2014



By a News Reporter-Staff News Editor at Journal of Engineering -- According to news reporting originating from Alexandria, Virginia, by VerticalNews journalists, a patent by the inventors Tanner, Shawn M. (San Jose, CA); Hu, Yufeng (Fremont, CA); Sochava, Sergei (Sunnyvale, CA), filed on May 22, 2012, was published online on June 17, 2014.

The assignee for this patent, patent number 8753903, is Western Digital (Fremont), LLC (Fremont, CA).

Reporters obtained the following quote from the background information supplied by the inventors: "In an energy-assisted magnetic recording (EAMR) system (e.g., hard disk), the minimum written bit size in the media is controlled by the minimum optical spot size produced by a near field transducer (NFT) acting as a plasmon element. In one design, the NFT has two portions, such as a disc and a pin, that serve different purposes. The disc converts electromagnetic energy of incident light into surface plasmons, and the pin channels a highly localized surface plasmon field to an air bearing surface (ABS). The performance of the NFT, both electric field intensity and spot size, depends on a number of NFT parameters such as core-NFT spacing, NFT-spacer interface, NFT size, NFT shape, NFT thickness, pin length, pin width, pin thickness, and NFT material. Additionally, the performance depends on the illumination conditions which are determined by the waveguide geometry (e.g., solid immersion mirror or channel waveguide) and grating coupler design.

"In the related art, device characterization is generally performed at bar or slider level. However, bar or slider level testing is a time consuming and expensive process because it involves many backend processes (e.g., lapping process and other processes). Therefore, it is desirable to develop better methods and apparatuses to characterize the performance of the NFT such that the testing and development cycle can be reduced."

In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventors' summary information for this patent: "Embodiments of the present invention are directed to improved pump-probe testing methods and apparatuses for measuring the performance of a plasmon element such as an NFT at wafer level. According to various embodiments, a pump-probe technique can be applied during a wafer manufacturing process to characterize the performance of the plasmon element. Therefore, the performance of the plasmon element can be evaluated earlier than that can be achieved in the related art.

"According to an embodiment of the present invention, an apparatus for measuring performance of a plasmon element on a wafer is provided. The apparatus includes a light source configured to output a first light beam on a grating located at a first end of a waveguide, the waveguide being configured to couple energy of the first light beam to the plasmon element located at a second end of the waveguide, and an optical probe assembly positioned above a top surface of the wafer. The optical probe assembly is configured to direct a second light beam on an area of the wafer including the plasmon element and detect a portion of the second light beam reflected from the area.

"According to another embodiment of the present invention, a method for measuring performance of a plasmon element on a wafer is provided. The method includes outputting from a light source a first light beam on a grating located at a first end of a waveguide, the waveguide being configured to couple energy of the first light beam to the plasmon element located at a second end of the waveguide, positioning an optical probe assembly above a top surface of the wafer, and operating the optical probe assembly to direct a second light beam on an area of the wafer including the plasmon element and detect a portion of the second light beam reflected from the area."

For more information, see this patent: Tanner, Shawn M.; Hu, Yufeng; Sochava, Sergei. Methods and Apparatuses for Performing Wafer Level Characterization of a Plasmon Element. U.S. Patent Number 8753903, filed May 22, 2012, and published online on June 17, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8753903.PN.&OS=PN/8753903RS=PN/8753903

Keywords for this news article include: Western Digital.

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Source: Journal of Engineering


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