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Patent Issued for Thee-Dimensional Integrated Semiconductor Device and Method for Manufacturing Same

June 25, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Alexandria, Virginia, VerticalNews journalists report that a patent by the inventors Ogata, Yoshiharu (Sakata, JP); Aizawa, Tadashi (Suwa, JP); Kitazawa, Takeo (Azumino, JP), filed on May 19, 2010, was published online on June 10, 2014.

The patent's assignee for patent number 8749041 is Seiko Epson Corporation (JP).

News editors obtained the following quote from the background information supplied by the inventors: "The present invention relates to a semiconductor device which is particularly preferably applied to a three-dimensional integrated configuration.

"There has been a method in which a face-up mounted semiconductor chip is stacked on a face-down mounted semiconductor chip in a semiconductor device of related art in order to achieve high density packaging of the semiconductor chip.

"For example, disclosed in an example of related art is a method for forming a conductor film on a rear surface of a second semiconductor chip mounted on a first semiconductor chip in order to restrain interference between the stacked semiconductor chips caused by noise.

"Japanese Patent No. 3,681,690 is the example of related art.

"However, in a stacked structure of the semiconductor chips of related art, the interference occurs between the stacked semiconductor chips caused by noise, disadvantageously leading to reduced reliability of the semiconductor device. Further, in the method disclosed in the example of related art, the conductor film needs to be formed on the rear surface of the second semiconductor chip mounted on the first semiconductor chip, disadvantageously leading to a complicated manufacturing process of the second semiconductor chip."

As a supplement to the background information on this patent, VerticalNews correspondents also obtained the inventors' summary information for this patent: "The invention is intended to provide a semiconductor device in which chips can be stacked while suppressing the interference between the chips caused by noise, and a method for manufacturing the same.

"According to a first aspect of the invention, a semiconductor device includes a first semiconductor chip that is face-down mounted on a substrate, a second semiconductor chip that is face-up mounted on the first semiconductor chip, and an electromagnetic shielding plate that is interposed between the first semiconductor chip and the second semiconductor chip.

"In this case, even if the second semiconductor chip is stacked on the first semiconductor chip, it may be possible to suppress the interference between the first and second semiconductor chips caused by noise, without the complicated manufacturing process of the first and second semiconductor chips. Therefore, the cost may be prevented from increasing and packaging density of the semiconductor chip may be improved.

"According to a second aspect of the invention, a semiconductor device includes a first semiconductor chip that is face-down mounted on a substrate, a second semiconductor chip that is face-up mounted on the first semiconductor chip, and a dummy chip that is interposed between the first semiconductor chip and the second semiconductor chip and having a conductor film formed on an upper or lower surface if the dummy chip.

"In this case, since the dummy chip is interposed between the first semiconductor chip and the second semiconductor chip, suppressed may be the interference between the first and second semiconductor chips caused by noise. Thus, the packaging density of the semiconductor chip may be improved without leading to the complicated manufacturing process of the first and second semiconductor chips.

"According to a third aspect of the invention, a semiconductor device includes a first semiconductor chip that is face-down mounted on a substrate, a second semiconductor chip that is face-up mounted on the first semiconductor chip, and an electronic component that is arranged below the second semiconductor chip and mounted on the substrate.

"In this case, even if the second semiconductor chip is stacked on the first semiconductor chip, the second semiconductor chip and the electronic component may be arranged above the substrate to as to overlap each other, restraining increase of the packaging area.

"According to a fourth aspect of the invention, a semiconductor device includes a first semiconductor chip that is face-down mounted on a substrate, a second semiconductor chip that is face-up mounted on the first semiconductor chip, an electronic component that is arranged below the second semiconductor chip and mounted on the substrate, and a spacer that is interposed between the first semiconductor chip and the second semiconductor chip, the spacer separating the second semiconductor chip from the electronic component.

"In this case, even if the second semiconductor chip is stacked on the first semiconductor chip, the second semiconductor chip and the electronic component may be arranged above the substrate to as to overlap each other, restraining increase of the packaging area.

"In the semiconductor device of the aspects of the invention, the second semiconductor chip preferably be larger than the first semiconductor chip.

"In this case, the electronic component may be arranged below the second semiconductor chip while not contacting with the first semiconductor chip disposed beneath the second semiconductor chip. Thus, the packaging area may be increased.

"In the semiconductor device of the aspects of the invention, the first semiconductor chip may have an analog IC and the second semiconductor chip may have a digital IC.

"In this case, even if the analog IC and the digital IC are stacked on the same substrate, it may be possible suppress the interference between the analog IC and the digital IC caused by noise. This may suppress increase of the packaging area and reduce characteristic deterioration of the analog IC and the digital IC.

"According to a fifth aspect of the invention, a method for manufacturing a semiconductor device includes face-down mounting a first semiconductor chip on a substrate, disposing on the first semiconductor chip a dummy chip having a conductor film formed on an upper or lower surface of the dummy chip, and face-up mounting a second semiconductor chip on the dummy chip.

"In this case, since the dummy chip is mounted between the first semiconductor chip and the second semiconductor chip, it may be possible to suppress the interference between the first and second semiconductor chips caused by noise. Thus, the cost may be prevented from increasing, improving the packaging density of the semiconductor chip."

For additional information on this patent, see: Ogata, Yoshiharu; Aizawa, Tadashi; Kitazawa, Takeo. Thee-Dimensional Integrated Semiconductor Device and Method for Manufacturing Same. U.S. Patent Number 8749041, filed May 19, 2010, and published online on June 10, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8749041.PN.&OS=PN/8749041RS=PN/8749041

Keywords for this news article include: Electronics, Semiconductor, Seiko Epson Corporation.

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Source: Electronics Newsweekly


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