News Column

Patent Issued for Non-Volatile Memory Device Including Dummy Electrodes and Method of Fabricating the Same

June 25, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- According to news reporting originating from Alexandria, Virginia, by VerticalNews journalists, a patent by the inventors Wenxu, Xianyu (Yongin-si, KR); Lee, Jung-hyun (Suwon-si, KR); Ma, Dong-joon (Anyang-si, KR); Kim, Yeon-hee (Seoul, KR); Park, Yong-young (Daejeon, KR); Lee, Chang-soo (Suwon-si, KR), filed on December 22, 2009, was published online on June 10, 2014.

The assignee for this patent, patent number 8748969, is Samsung Electronics Co., Ltd. (Gyeonggi-Do, KR).

Reporters obtained the following quote from the background information supplied by the inventors: "Example embodiments relate to a semiconductor device, and more particularly, to a non-volatile memory device and a method of fabricating the same.

"The sizes of semiconductor devices are continuously being reduced, while at the same time the semiconductor devices have to process larger amounts of data. Therefore, improving the integration of non-volatile memory devices used in such semiconductor devices may be necessary. In this regard, memory cells may be vertically stacked in a non-volatile memory device having a multi-layer structure, and thus, the non-volatile memory device having a multi-layer structure may be further integrated as compared to a non-volatile memory device having a single layer structure.

"Developing a contact structure within a non-volatile memory device having a multi-layer structure is not easy, and, due to the complexity of the contact structure, integration of the non-volatile memory device is limited and a method of fabricating the same becomes more complicated."

In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventors' summary information for this patent: "Example embodiments include a non-volatile memory device, of which integration and quality of a channel layer is improved by simplifying a contact structure, and a method of fabricating the same. Additional aspects will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of example embodiments.

"According to example embodiments, a non-volatile memory device may include a substrate; a plurality of semiconductor pillars on the substrate; a plurality of control gate electrodes stacked on the substrate and intersecting the plurality of semiconductor pillars; a plurality of dummy electrodes stacked adjacent to the plurality of control gate electrodes on the substrate, the plurality of dummy electrodes being spaced apart from the plurality of control gate electrodes; a plurality of via plugs connected to the plurality of control gate electrodes; and a plurality of wordlines on the plurality of via plugs, wherein each of the plurality of via plugs penetrates a corresponding one of the plurality of control gate electrodes and at least one of the plurality of dummy electrodes.

"The plurality of control gate electrodes may include protrusions connected to the plurality of via plugs, and each of the plurality of dummy electrodes may be adjacent to and spaced apart from the protrusions.

"The protrusions of the plurality of control gate electrodes may be stacked such that the protrusions do not overlap each other. The protrusions of the plurality of control gate electrodes may be alternately stacked at two opposite sides of the plurality of control gate electrodes. Alternatively, the protrusions of the plurality of control gate electrodes may be stacked in a cascade shape at one side of the plurality of control gate electrodes such that the protrusions do not overlap each other.

"The non-volatile memory device may further include a plurality of charge storage layers between the sidewalls of the plurality of semiconductor pillars and the plurality of control gate electrodes. The non-volatile memory device may further include a plurality of tunneling insulation layers between the sidewalls of the plurality of semiconductor pillars and the plurality of charge storage layers; and a plurality of blocking insulation layers between the plurality of charge storage layers and the plurality of control gate electrodes.

"According to example embodiments, a non-volatile memory device may include a substrate; a plurality of semiconductor pillars arranged in columns and rows on the substrate; a plurality of control gate electrodes stacked on the substrate and intersecting the plurality of semiconductor pillars; a plurality of via plugs connected to the plurality of control gate electrodes; a plurality of wordlines on the plurality of via plugs; a plurality of bitlines on the plurality of control gate electrodes to connect the plurality of semiconductor pillars in a horizontal direction; a plurality of upper select gate electrodes on the plurality of control gate electrodes and intersecting the plurality of semiconductor pillars in a horizontal direction; and a plurality of lower select gate electrodes on portions of the substrate adjacent to the plurality of semiconductor pillars in a vertical direction and below the plurality of control gate electrodes, the plurality of lower select gate electrodes extending in a same direction as the plurality of bitlines.

"According to example embodiments, a method of fabricating a non-volatile memory device may include stacking a plurality of control gate electrodes and a plurality of dummy electrodes on a substrate, wherein the plurality of dummy electrodes are spaced apart from the plurality of control gate electrodes; forming a plurality of semiconductor pillars penetrating the plurality of control gate electrodes; forming a plurality of via plugs that are connected to the plurality of control gate electrodes, wherein each of the plurality of via plugs penetrates a corresponding one of the plurality of control gate electrodes and at least one of the plurality of dummy electrodes; and forming a plurality of wordlines on the plurality of via plugs.

"Forming the plurality of semiconductor pillars may include forming a plurality of amorphous semiconductor layers penetrating the plurality of control gate electrodes; and re-crystallizing the plurality of amorphous semiconductor layers by performing ELA (excimer laser annealing). After the re-crystallization of the plurality of amorphous semiconductor layers, the plurality of semiconductor pillars may have columnar crystal structure extending in an upward direction from the substrate.

"The method may further include forming a plurality of interlayer insulation layers between the plurality of control gate electrodes and between the plurality of dummy electrodes; and planarizing the plurality of interlayer insulation layers."

For more information, see this patent: Wenxu, Xianyu; Lee, Jung-hyun; Ma, Dong-joon; Kim, Yeon-hee; Park, Yong-young; Lee, Chang-soo. Non-Volatile Memory Device Including Dummy Electrodes and Method of Fabricating the Same. U.S. Patent Number 8748969, filed December 22, 2009, and published online on June 10, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8748969.PN.&OS=PN/8748969RS=PN/8748969

Keywords for this news article include: Semiconductor, Samsung Electronics Co. Ltd..

Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2014, NewsRx LLC


For more stories covering the world of technology, please see HispanicBusiness' Tech Channel



Source: Electronics Newsweekly


Story Tools






HispanicBusiness.com Facebook Linkedin Twitter RSS Feed Email Alerts & Newsletters