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Patent Issued for Semiconductor Memory Devices with a Power Supply

June 18, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- A patent by the inventor Song, Tae-Joong (Seongnam-si, KR), filed on January 16, 2012, was published online on June 3, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8743646 is assigned to Samsung Electronics Co., Ltd. (Suwon-Si, Gyeonggi-Do, KR).

The following quote was obtained by the news editors from the background information supplied by the inventors: "Exemplary embodiments of the inventive concept relate to power supply, and more particularly to semiconductor devices with a power supply.

"A semiconductor device may operate at fast operating speeds using a high power supply voltage. However, use of a high power supply voltage may shorten the life of the device by accelerating degeneration of elements such as transistors, increase noise, and cause increased power consumption.

"Since mobile devices typically need to operate at high speeds and have a limited amount of battery power, they may be more adversely affected by high power supply voltages."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventor's summary information for this patent: "At least one exemplary embodiment of the inventive concept provides a semiconductor device that uses a power supply scheme to enhance an operating speed without increasing a power supply voltage.

"At least one exemplary embodiment of the inventive concept provides a semiconductor device that uses a power supply scheme to decrease an effect of noise on power supply lines.

"At least exemplary embodiment of the inventive concept provides a semiconductor device that uses a power supply scheme to provide stable power in a power-down mode.

"A semiconductor device according to an exemplary embodiment of the inventive concept includes a virtual power supplier, a driving signal generator and a load driver. The virtual power supplier boosts a driving voltage to generate a virtual voltage. The driving signal generator generates a driving signal based on the virtual voltage, such that the driving signal has a voltage level that is reinforced compared with a voltage level of the driving voltage. The load driver drives a load based on the driving voltage and the driving signal.

"For example, the driving signal generator may be configured to generate a boosted driving signal from supply of the virtual voltage (e.g., virtual voltage is applied to a power supply terminal or ground terminal of the driving signal generator). The boosted driving signal may have a voltage level that is boosted as compared with a voltage level of a driving signal that is generated when the driving signal generator is supplied with the driving voltage (e.g., driving voltage is applied to the power supply terminal or ground terminal of the driving signal generator).

"The virtual power supplier may include conductors capacitively-coupled to each other to generate the virtual voltage.

"The driving voltage may include a ground voltage and a power supply voltage. The virtual power supplier may boost at least one of the ground voltage and the power supply voltage to generate at least one of a virtual ground voltage and a virtual power supply voltage, such that the virtual ground voltage has a voltage level lower than a voltage level of the ground voltage and the virtual power supply voltage has a voltage level higher than a voltage level of the power supply voltage.

"The virtual power supplier may includes a virtual voltage conductor configured to provide the virtual voltage, a boosting conductor capacitively-coupled to the virtual voltage conductor, a switch coupled between the virtual voltage conductor and at least one of a ground voltage and a power supply voltage and configured to control a floating timing of the virtual voltage conductor, and a boosting driver configured to provide a power to the boosting conductor.

"The switch of the virtual power supplier may be coupled between the virtual voltage conductor and the ground voltage to provide a virtual ground voltage having a voltage level lower than a voltage level of the ground voltage, and the driving signal generator may generate the boosted driving signal based on the power supply voltage and the virtual ground voltage.

"The switch of the virtual power supplier may be coupled between the virtual voltage conductor and the power supply voltage to provide a virtual power supply voltage having a voltage level higher than a voltage level of the power supply voltage, and the driving signal generator may generate the boosted driving signal based on the virtual power supply voltage and the ground voltage.

"The virtual power supplier may include a first virtual power supplier and a second virtual power supplier. The first virtual power supplier may include first conductors capacitively-coupled to each other to generate a virtual ground voltage by boosting a ground voltage such that the virtual ground voltage has a voltage level lower than a voltage level of the ground voltage. The second virtual power supplier may include second conductors capacitively-coupled to each other to generate a virtual power supply voltage by boosting a power supply voltage such that the virtual power supply voltage has a voltage level higher than a voltage level of the power supply voltage.

"The driving signal generator may generate the boosted driving signal based on the virtual power supply voltage and the virtual ground voltage.

"In an exemplary embodiment of the inventive concept, a boosting timing of the ground voltage by the first virtual power supplier and a boosting timing of the power supply voltage by the second virtual power supplier may be controlled based on a common timing control signal. The common timing control signal may be a clock signal of the semiconductor device.

"In other exemplary embodiment of the inventive concept, a boosting timing of the ground voltage by the first virtual power supplier may be controlled based on a first timing control signal, and a boosting timing of the power supply voltage by the second virtual power supplier may be controlled based on a second timing control signal different from the first timing control signal.

"A semiconductor device according to an exemplary embodiment of the inventive concept includes a first pair of capacitively-coupled conductors, a second pair of capacitively-coupled conductors, a first transistor receiving a power supply voltage and connected to the last conductor of the first pair, a second transistor receiving a ground voltage and connected to the last conductor of the second pair, a first inverter receiving a timing control signal to output an inverted timing control signal to gates of both transistors, a driving signal generator receiving a first output of the last conductor of the first pair and a second output of the last conductor of the second pair, and a load driver receiving an output of the driving signal generator.

"A power supply terminal of the driving signal generator may receive the first output and a ground terminal of the driving signal generator may receive the second output. A power supply terminal of the load driver may receive the power supply voltage and a ground terminal of the driving signal generator may receive the ground voltage.

"A semiconductor memory device according to an exemplary embodiment of the inventive concept includes a memory cell array including a plurality of memory cells coupled to a plurality of wordlines and a plurality of bitlines, a virtual power supplier configured to boost a driving voltage to generate a virtual voltage, and a plurality of driving units configured to drive the wordlines, respectively. Each driving unit includes a driving signal generator and a wordline driver. The driving signal generator generates a driving signal based on the virtual voltage such that the driving signal having a voltage level is reinforced as compared with a voltage level of the driving voltage. The wordline driver drives each of the wordlines based on the driving voltage and the driving signal.

"For example, the driving signal generator may be configured to generate a boosted driving signal from supply of the virtual voltage (e.g., application of the virtual voltage to a power supply terminal or ground terminal of the driving signal generator). The boosted driving signal may have a voltage that is boosted as compared with a voltage level of a driving signal that is generated when the driving signal generator is supplied with the driving voltage (e.g., application of the driving voltage to the power supply terminal or the ground terminal of driving signal generator). The wordline driver may drive each of the wordlines based on the driving voltage and the boosted driving signal.

"The virtual power supplier may include conductors capacitively-coupled to each other to generate the virtual voltage.

"The conductors may include metal lines that extend along a column direction of the memory cell array.

"The virtual power supplier may include a virtual voltage line that extends along a column direction of the memory cell array to provide the virtual voltage, a boosting line that extends in a direction parallel to the virtual voltage line to be capacitively-coupled to the virtual voltage line, a switch coupled between the virtual voltage line and at least one of a ground voltage and a power supply voltage and configured to control a floating timing of the virtual voltage line, and a boosting driver configured to provide a power to the boosting line.

"The boosting line may include a plurality of lines centered on the virtual voltage line. For example, the plurality of lines may be adjacent the virtual voltage line. For example, at least one of the lines may be adjacent to the left of the virtual voltage line and at least of the lines may be adjacent to the right of the virtual voltage line.

"A plurality of ground voltage lines may be foamed to surround the virtual voltage line and the boosting line for electric shielding of the virtual power supplier. For example, one of the ground voltage lines may be located left adjacently a boosting line that is to the left of the virtual voltage line and another one of the ground voltage lines may be located right adjacently a boosting line that is to the right of the virtual voltage line.

"A semiconductor device according to an exemplary embodiment of the inventive concept includes a first internal power line configured to provide a driving voltage, a second internal power line configured to provide a gate voltage, a plurality of driving signal generators configured to generate a plurality of driving signals based on the gate voltage, and a plurality of load drivers configured to drive a plurality of loads based on the driving voltage and the driving signals.

"The first internal power line may be connected to a first node of an external power line, and the second internal power line may be connected to a second node of the external power line, the second node being different from the first node.

"A cross-sectional area of the first internal power line may be greater than a cross-sectional area of the second internal power line so that a resistance of the first internal power line may be less than a resistance of the second internal power line. For example, a width of the first internal power line may be greater than a width of the second internal power line.

"The semiconductor device may be a semiconductor memory device. The plurality of load drivers may be a plurality of wordline drivers configured to drive a plurality of wordlines, respectively. The plurality of load drivers may be a plurality of bitline drivers configured to drive a plurality of bitlines, respectively. The plurality of load drivers may be a plurality of decoder drivers configured to drive a plurality of address lines, respectively. Alternately, the plurality of load drivers may be a plurality of output drivers configured to drive a plurality of output lines, respectively.

"A semiconductor device according to an exemplary embodiment of the inventive concept includes a dummy power diode, a dummy retention circuit, a plurality of power diodes and a plurality of retention circuits. The dummy power diode is coupled between a power supply voltage line and a gate voltage line, and a gate of the dummy power diode is coupled to the gate voltage line. The dummy retention circuit is coupled between the gate voltage line and a ground voltage line. The plurality of power diodes are coupled in parallel between the power supply voltage line and a virtual power supply voltage line, and gates of the power diodes are coupled to the gate voltage line. The plurality of retention circuits are coupled in parallel between the virtual power supply voltage line and the ground voltage line.

"A resistance of the dummy retention circuit may be less than a resistance of the retention circuit. The dummy retention circuit may include a plurality of dummy circuits coupled in parallel between the gate voltage line and the ground voltage line, each dummy circuit having same configuration as the retention circuit. The dummy retention circuit and the retention circuits may be formed through same manufacturing process to have same operational characteristics.

"The semiconductor device may further include a power switch coupled between the power supply voltage line and the virtual power supply voltage line.

"The retention circuit may include a plurality of static random access memory (SRAM) cells coupled between bitline pairs."

URL and more information on this patent, see: Song, Tae-Joong. Semiconductor Memory Devices with a Power Supply. U.S. Patent Number 8743646, filed January 16, 2012, and published online on June 3, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8743646.PN.&OS=PN/8743646RS=PN/8743646

Keywords for this news article include: Semiconductor, Samsung Electronics Co. Ltd..

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Source: Electronics Newsweekly


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