News Column

Patent Issued for Semiconductor Embedded Module and Method for Producing the Same

June 18, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- A patent by the inventors Kawabata, Kenichi (Tokyo, JP); Endo, Toshikazu (Tokyo, JP), filed on July 17, 2009, was published online on June 3, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8742589 is assigned to TDK Corporation (Tokyo, JP).

The following quote was obtained by the news editors from the background information supplied by the inventors: "The present invention relates to a semiconductor embedded module and a method for producing the same.

"Generally, a substrate which is provided with an electronic component (electronic component-embedded substrate) such as a semiconductor device (an IC chip or other type of semiconductor active element) has a structure in which a semiconductor device (die) in a bare chip state is fixed to a substrate constituted by a single resin layer or plural resin layers. In order to respond to the demand for higher performance and downsizing of electronic equipment, modules are now being provided with higher-density packaging of active components such as semiconductor devices and passive components such as resistors and capacitors.

"In recent years, there has been a stronger demand than ever before for portable equipment typified by portable terminals such as mobile telephones to be provided in higher-density packaging. More recently, the demand, in particular, for a reduction in thickness and narrowing of portable equipment has been increasing. In response, there has been a strong demand for a higher density, a reduction in thickness, and a decrease in pitch in semiconductor embedded modules used in the above portable equipment, etc., and also, a further reduction in thickness of the electronic components themselves has been proceeding rapidly. As an example of such semiconductor embedded modules, a module in which a CSP (chip size package) including an IC chip has been subjected to redistribution (rewiring) and is embedded in a resin substrate is proposed in JP2004-072032 A."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "In order to draw wiring onto a substrate from an IC chip or CSP which is embedded in the substrate to form a module, a via needs to be formed on a wiring layer (redistribution layer, rewiring layer) of the IC chip. However, as described above, with downsizing and a reduction in pitch of a device or component, alignment between an external connection pad of the IC chip and a via has been becoming difficult to be performed with high precision. If the via is opened at the position where the via is dislocated from the external connection pad of the IC chip, the circuit of the IC chip or distribution layer of the CSP may be damaged when the circuit or redistribution layer is at the opening position.

"The present invention has been made in light of the above circumstances, and therefore has an object to provide a semiconductor embedded module which, when forming a via for external connection for a semiconductor device, can prevent a circuit or wiring of the semiconductor device from being damaged, and to provide a method for producing the same.

"In order to attain the above object, the semiconductor embedded module of the invention is provided with: a semiconductor device which is provided with or connected with a wiring layer; a first insulating layer which is provided in the periphery of the wiring layer such that an external connection pad of the wiring layer is exposed; and a second insulating layer which is provided on the first insulating layer and which has a grinding rate larger than that of the first insulating layer.

"In the semiconductor embedded module with the above structure, when grinding the second insulating layer in order to form a via on the external connection pad for external connection of the semiconductor device, even if the via formation position is dislocated from the target position, the semiconductor device is protected by the first insulating layer because the grinding rate of the second insulating layer is larger than that of the fist insulating layer; in other words, the first insulating layer is more difficult to be ground than the second insulating layer. Accordingly, the circuit and internal wiring of the semiconductor device are not damaged due to grinding.

"As described above, even if the via opening position is slightly dislocated from the position of the external connection pad, in other words, the via is opened on at least a part of the external connection pad and at least a part of the first insulating layer, wiring can be reliably drawn to the outside without damaging the semiconductor device.

"More specifically, it is preferable that the first insulating layer is formed of imide resin or a resin composition containing imide resin and that the second insulating layer is formed of epoxy resin or a resin composition containing epoxy resin, since both the layers are significantly different in terms of grinding rates.

"Further, the method for producing a semiconductor embedded module according to the invention is a method for effectively producing the semiconductor embedded module of the invention, and the method includes the steps of: preparing a semiconductor device which is provided with a wiring layer; providing a first insulating layer in the periphery of the wiring layer such that an external connection pad of the wiring layer is exposed; providing, on the first insulating layer, a second insulating layer having a grinding rate larger than that of the first insulating layer; and grinding a part of the second insulating layer which is on the external connection pad to form a via to have the external connection pad exposed. Here, the step of providing a mask which is provided with an opening corresponding to a portion of the second insulating layer which is above the external connection pad may further be implemented, and in the step of having the external connection pad exposed, the second insulating layer may be ground through blasting treatment to form a via.

"Moreover, employing wet blasting for blasting treatment is useful because, in comparison with dry blasting, wet blasting easily prevents electrification.

"According to the invention, since the grinding rate of the second insulating layer provided on the first insulating layer provided in the periphery of the semiconductor device is larger than the grinding rate of the first insulating layer, when grinding the second insulating layer in order to form the via on the external connection pad for the semiconductor device, even if the via formation position is dislocated from the target position, the semiconductor device is protected by the first insulating layer. Accordingly, the circuit and internal wiring of the semiconductor device can be reliably prevented from being damaged due to grinding."

URL and more information on this patent, see: Kawabata, Kenichi; Endo, Toshikazu. Semiconductor Embedded Module and Method for Producing the Same. U.S. Patent Number 8742589, filed July 17, 2009, and published online on June 3, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8742589.PN.&OS=PN/8742589RS=PN/8742589

Keywords for this news article include: Electronics, Semiconductor, TDK Corporation.

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Source: Electronics Newsweekly


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