News Column

Patent Issued for Bipolar Multistate Nonvolatile Memory

June 17, 2014



By a News Reporter-Staff News Editor at Journal of Technology -- A patent by the inventor Chiang, Tony (Campbell, CA), filed on July 29, 2013, was published online on June 3, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8742392 is assigned to Intermolecular, Inc. (San Jose, CA).

The following quote was obtained by the news editors from the background information supplied by the inventors: "This invention relates to nonvolatile memory elements, and more particularly, to methods for forming resistive switching memory elements with multiple variable resistance layers.

"Nonvolatile memory elements are used in systems in which persistent storage is required. For example, digital cameras use nonvolatile memory cards to store images and digital music players use nonvolatile memory to store audio data. Nonvolatile memory is also used to persistently store data used by a computer.

"Nonvolatile memory is often formed using electrically-erasable programmable read only memory (EEPROM) technology. This type of nonvolatile memory contains floating gate transistors that can be selectively programmed or erased by application of suitable voltages to their terminals.

"As fabrication techniques improve, it is becoming possible to fabricate nonvolatile memory elements with increasingly smaller dimensions. However, as device dimensions shrink, scaling issues are posing challenges for traditional nonvolatile memory technology. This has led to the investigation of alternative nonvolatile memory technologies, including resistive switching nonvolatile memory.

"Resistive switching nonvolatile memory is formed using memory elements that have two or more stable states with different resistances. Bistable memory has two stable states. A bistable memory element can be placed in a high resistance state or a low resistance state by application of suitable voltages or currents. Voltage pulses are typically used to switch the memory element from one resistance state to the other. Nondestructive read operations can be performed to ascertain the value of a data bit that is stored in a memory cell.

"Higher memory densities enable greater storage capabilities with smaller form factors. Traditionally this is achieved by shrinking device dimensions (e.g. memory cell size), stacking memory chips in integrated chips in integrated packages, and combinations thereof. However, the above methods may introduce additional cost and complexity. It would therefore be desirable to further increase the densities of nonvolatile memories without relying solely on physical scaling and/or stacking alone."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventor's summary information for this patent: "Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having multiple layers of variable resistance switching material within a resistive switching memory element that are configured to increase the number of logic states to be greater than two per memory element. The resistive switching memory element may have any suitable number of variable resistance switching layers (hereafter variable resistance layers). If the memory element has a total of 'n' variable resistance layers, where 'n' is a positive integer, the resistive switching memory element may exhibit 'n+1' stable states. The variable resistance layers each having different switching characteristics can be formed by varying the layers materials or material properties. The memory element device decreases the vertical or horizontal physical density requirements necessary to achieve the same nonvolatile storage capacity and reduces the complexity of the nonvolatile memory device manufacturing process.

"A method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching capacity by using multiple layers of variable resistance switching layers is provided. In one embodiment, a multistate nonvolatile memory element includes a first layer, a second layer and a third layer. The first layer is operable as variable resistance layer having a first low resistance state and a first high resistive state. The first layer comprises a first material. The second layer is operable as a variable resistance layer connected in series with the first layer. The second layer has a second low resistance state and a second high resistance state. The second layer comprises a second material. The third layer is operable as a variable resistance layer and is connected in series with the first layer and the second layer. The third layer has a third low resistance state and a third high resistance state. The third layer comprises the second material and a chemical element that is not found in the second layer. The multistate nonvolatile memory element has at least four different stable resistive states.

"In another embodiment a multistate nonvolatile memory element includes a first layer, a second layer and a third layer. The first layer comprises a first layer and is operable as variable resistance layer having a first low resistance state and a first high resistive state. The first layer comprises a first material. The second layer is operable as a variable resistance layer and is connected in series with the first layer. The second layer has a second low resistance state and a second high resistance state and the second layer comprises a second material. The third layer is operable as variable resistance layer and is connected in series with the first layer and the second layer. The third layer has a third low resistance state and a third high resistance state and the third layer comprises a third material. The first layer, the second layer and the third layer each comprise at least one different chemical element from the other layers. The multistate nonvolatile memory element has at least four different stable resistive states.

"In yet another embodiment, a multistate nonvolatile memory element includes a first layer, a second layer and a third layer. The first layer is operable as variable resistance layer having a first low resistance state and a first high resistive state. The first layer comprises a first material. A second layer is operable as a variable resistance layer connected in series with the first layer. The second layer has a second low resistance state and a second high resistance state and the second layer comprises a second material. The third layer is operable as variable resistance layer connected in series with the first layer and the second layer. The third layer has a third low resistance state and a third high resistance state and the third layer comprises a third material. The material of the first layer, the second layer and the third layer each comprise a first chemical element and a second chemical element, and the ratio of the first chemical element to the second chemical element in the first layer, second layer and third layer are each different. The multistate nonvolatile memory element has at least four different stable resistive states.

"In still another embodiment of the present invention sets forth a stack of multistate nonvolatile memory elements that includes a first memory element and a second memory element. The first memory element includes a first layer, second layer and third layer. The first layer is operable as variable resistance layer having a first low resistance state and a first high resistive state. The first layer comprises a first material. The second layer is operable as a variable resistance layer connected in series with the first layer. The second layer has a second low resistance state and a second high resistance state. The second layer second layer comprises a second material. The third layer is operable as variable resistance layer connected in series with the first layer and the second layer. The third layer has a third low resistance state and a third high resistance state. The third layer comprises a third material. The first, second and the third high resistance states are different for each layer. The multistate nonvolatile memory element has at least four different stable resistive states. The second memory element comprises multiple variable resistance layers comprising at least four different stable resistive states. A fourth layer is operable as an electrode and a word-line and bit-line, and is disposed between the first and second memory elements.

"In still another embodiment of the present invention sets forth a method of storing information in a multistate nonvolatile memory element. The method comprises delivering a first current in a first direction through the memory element that comprises a first variable resistance layer, a second variable resistance layer and a third variable resistance layer. The first variable resistance layer, the second variable resistance layer and the third variable resistance layer each have a high resistance state and a low resistance state. The first current causes the first variable resistance layer to switch from its high resistance state to its low resistance state while the second variable resistance layer and the third variable resistance layer each remain in their high resistance state. Delivering a second current in the first direction through the memory element causes the second variable resistance layer to switch from its high resistance state to its low resistance state while the first variable resistance layer remains in its low resistance state and the third variable resistance layer remains in its high resistance state. Delivering a third current in the first direction through the memory element causes the third variable resistance layer to switch from its high resistance state to its low resistance state while the first variable resistance layer and the second variable resistance layer each remain in their low resistance state. Applying a fourth current in a second direction through the multistate nonvolatile memory element causes the variable resistance layers of the memory element to each switch from their low resistance state to their high resistance state."

URL and more information on this patent, see: Chiang, Tony. Bipolar Multistate Nonvolatile Memory. U.S. Patent Number 8742392, filed July 29, 2013, and published online on June 3, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8742392.PN.&OS=PN/8742392RS=PN/8742392

Keywords for this news article include: Technology, Intermolecular Inc..

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Source: Journal of Technology