News Column

"Electronic Component Embedded Substrate and Manufacturing Method Thereof" in Patent Application Approval Process

June 20, 2014



By a News Reporter-Staff News Editor at Health & Medicine Week -- A patent application by the inventors CHUNG, Yul Kyo (Yongin, KR); LEE, Doo Hwan (Daejeon, KR); LEE, Seung Eun (Sungnam, KR); SHIN, Yee Na (Suwon, KR), filed on November 27, 2013, was made available online on June 5, 2014, according to news reporting originating from Washington, D.C., by NewsRx correspondents (see also Samsung Electro-mechanics Co., Ltd.).

This patent application is assigned to Samsung Electro-mechanics Co., Ltd.

The following quote was obtained by the news editors from the background information supplied by the inventors: "The present invention relates to an electronic component embedded substrate.

"As the recently released mobile devices such as smartphones and tablet PCs have been dramatically improved in performance and demanded to have high portability, studies on miniaturization, slimming, and high performance of electronic components used in these mobile devices have been continuously made.

"Here, since an electronic component embedded substrate disclosed in Patent Document 1 etc. can secure a space for mounting extra components on its surface by embedding electronic components in a substrate, it has been highlighted as a way of implementing the miniaturization, slimming, and high performance of the electronic components mounted in the mobile devices.

"In particular, as the performance of semiconductor chips is improved, stability of power supplied to the semiconductor chips is considered as important. For this, a decoupling capacitor or a bypass capacitor is provided between the semiconductor chip and a power supply line to remove noise of power and supply a stable current to the semiconductor chip in a situation in which a power supply current is being changed suddenly.

"At this time, when mounting the semiconductor chip on the capacitor embedded substrate, since a distance between the decoupling capacitor and the semiconductor chip is minimized, it is possible to implement miniaturization and slimming while stably supplying power to the high performance semiconductor chip.

"Meanwhile, according to Patent Document 1, a method of fixing a capacitor after processing a cavity in a position where an electronic component is to be inserted, embedding the electronic component by thermocompression using an insulator, processing a micro via hole with laser, and achieving electrical connection through plating is disclosed.

"That is, in order to electrically connect between the electronic component embedded in a substrate and a circuit pattern provided on a surface of the substrate, a method of processing a via hole using laser and filling a conductive material in the via hole by a method such as plating has been commonly applied.

"According to this common method, minimum conditions on the area of a via contact which is to be formed in the embedded electronic component can be determined according to factors such as placing tolerance generated when the electronic component is embedded in the substrate, via hole processing tolerance, and via hole size.

"However, since the size of the via contact should be reduced according to a reduction in the size of the electronic component, as the electronic component becomes smaller, a matching error of the via and the electronic component is emerged as a serious problem."

In addition to the background information obtained for this patent application, NewsRx journalists also obtained the inventors' summary information for this patent application: "The present invention has been invented in order to overcome the above-described problems and it is, therefore, an object of the present invention to provide an electronic component embedded substrate that can improve electrical connectivity of an electronic component embedded in a substrate.

"Further, it is another object of the present invention to provide an electronic component embedded substrate that can improve electronic connectivity of an electronic component embedded in a substrate.

"In accordance with one aspect of the present invention to achieve the object, there is provided an electronic component embedded substrate including: a first insulating layer including a cavity; an electronic component inserted in the cavity and having at least one external electrode; a first metal pattern formed on a lower surface of the first insulating layer to mount the electronic component thereon and including at least one guide hole for exposing a portion of the external electrode; a second insulating layer formed on the lower surface of the first insulating layer to cover the first metal pattern; a first circuit pattern formed on a lower surface of the second insulating layer; and a first via for electrically connecting the first external electrode exposed through the guide hole and the first circuit pattern.

"At this time, the first metal pattern may be formed in plural number to correspond to the respective external electrodes, and the first metal patterns may be separated from each other by a gap.

"Further, the electronic component embedded substrate may further include a second via for electrically connecting the first metal pattern and the first circuit pattern.

"Further, the electronic component embedded substrate may further include a second metal pattern formed on an upper surface of the first insulating layer to define a formation region of the cavity.

"At this time, a sidewall of the second metal pattern and a sidewall of the cavity may be positioned on the same plane.

"Further, the second metal pattern may be disposed to be separated from the sidewall of the cavity.

"Further, the electronic component embedded substrate may further include a through-via passing through the first insulating layer to electrically connect the first metal pattern and the second metal pattern.

"Further, the electronic component embedded substrate may further include a third insulating layer formed on the upper surface of the first insulating layer to cover the second metal pattern and the electronic component; and a second circuit pattern formed on an upper surface of the third insulating layer.

"Further, the electronic component embedded substrate may further include a third via passing through the third insulating layer to electrically connect the external electrode and the second circuit pattern.

"Further, the electronic component embedded substrate may further include a fourth via passing through the third insulating layer to electrically connect the second circuit pattern and the second metal pattern.

"Further, the electronic component embedded substrate may further include a filler for filling a space between the cavity and the electronic component.

"Further, the third insulating layer and the filler may be formed integrally.

"Further, an insulating adhesive layer may be further provided between a lower surface of the electronic component and the first metal pattern, and the first via may be in contact with the external electrode through the insulating adhesive layer.

"Further, the first via may be self-aligned with the external electrode by the guide hole.

"Further, the first metal pattern may be in contact with the external electrode.

"At this time, the first via may be in contact with the external electrode exposed through the guide hole and the first metal pattern.

"In accordance with another aspect of the present invention to achieve the object, there is provided a method of manufacturing an electronic component embedded substrate including: forming a cavity in a first insulating layer; forming a first metal pattern which is formed on a lower surface of the first insulating layer to extend to a region of the cavity and includes at least one guide hole; mounting an electronic component on the first metal pattern by inserting the electronic component in the cavity; forming a second insulating layer on the lower surface of the first insulating layer to cover the first metal pattern; exposing a lower surface of the electronic component through the guide hole by forming a via hole passing through the second insulating layer; and forming a first via inside the via hole to be in contact with the lower surface of the electronic component.

"At this time, the via hole may be formed by irradiating CO.sub.2 laser to the second insulating layer.

"Further, the electronic component may be inserted in the cavity in a state in which an insulating adhesive layer is formed on an upper surface of the first metal pattern.

"Further, the electronic component may be inserted in the cavity in a state in which an insulating adhesive layer is formed on the lower surface of the electronic component.

"Further, the step of forming the first metal pattern may include the steps of: adhering an insulating adhesive layer to the lower surface of the first insulating layer; forming a metal layer on a lower surface of the insulating adhesive layer; and removing a metal material in a region of the metal layer in which the guide hole is to be provided.

"Further, the cavity may be formed by irradiating laser in a state in which a second metal pattern having a mask hole is coupled to an upper surface of the first insulating layer.

"Further, the method of manufacturing an electronic component embedded substrate may further include the step of forming a third insulating layer on the upper surface of the first insulating layer to cover an upper surface of the second metal pattern and an upper surface of the electronic component.

"Further, the electronic component may have at least two external electrodes, the first metal pattern may be formed in plural number to correspond to the respective external electrodes, and the first metal patterns may be separated from each other by a gap.

BRIEF DESCRIPTION OF THE DRAWINGS

"These and/or other aspects and advantages of the present general inventive concept will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:

"FIG. 1a is a view schematically showing an electronic component embedded substrate in accordance with an embodiment of the present invention;

"FIG. 1b is a view schematically showing a modified example of the electronic component embedded substrate in accordance with an embodiment of the present invention;

"FIG. 1c is a view schematically showing another modified example of the electronic component embedded substrate in accordance with an embodiment of the present invention;

"FIG. 1d is a view schematically showing still another modified example of the electronic component embedded substrate in accordance with an embodiment of the present invention;

"FIG. 2a is a cross-sectional view schematically showing a main part of the electronic component embedded substrate in accordance with an embodiment of the present invention;

"FIG. 2b is a bottom view schematically showing the state in which an electronic component is excluded from the main part of the electronic component embedded substrate in accordance with an embodiment of the present invention;

"FIG. 2c is a cross-sectional view schematically showing the state in which the electronic component is excluded from the main part of the electronic component embedded substrate in accordance with an embodiment of the present invention;

"FIG. 3 is a view schematically showing an electronic component embedded substrate in accordance with another embodiment of the present invention;

"FIG. 4 is a view schematically showing an electronic component embedded substrate in accordance with still another embodiment of the present invention;

"FIG. 5 is a view schematically showing an electronic component embedded substrate in accordance with yet another embodiment of the present invention;

"FIGS. 6a to 6e are process diagrams schematically showing a method of manufacturing an electronic component embedded substrate in accordance with an embodiment of the present invention, wherein

"FIG. 6a is a cross-sectional view schematically showing the state before an electronic component is inserted in a cavity,

"FIG. 6b is a cross-sectional view schematically showing the state in which the electronic component is inserted in the cavity,

"FIG. 6c is a cross-sectional view schematically showing the state in which a second insulating layer and a third insulating layer are formed,

"FIG. 6d is a cross-sectional view schematically showing the state in which a via and a circuit pattern are formed on the second insulating layer and the third insulating layer, and

"FIG. 6e is a cross-sectional view schematically showing the state in which a solder resist and a solder bump are formed and a surface mount component is coupled; and

"FIGS. 7a to 7e are process diagrams schematically showing a method of manufacturing an electronic component embedded substrate in accordance with another embodiment of the present invention, wherein

"FIG. 7a is a cross-sectional view schematically showing the state before an electronic component is inserted in a cavity,

"FIG. 7b is a cross-sectional view schematically showing the state in which the electronic component is inserted in the cavity and the electronic component is fixed by an insulating adhesive layer,

"FIG. 7c is a cross-sectional view schematically showing the state in which a second insulating layer and a third insulating layer are formed,

"FIG. 7d is a cross-sectional view schematically showing the state in which a via and a circuit pattern are formed on the second insulating layer and the third insulating layer, and

"FIG. 7e is a cross-sectional view schematically showing the state in which a solder resist and a solder bump are formed and a surface mount component is coupled."

URL and more information on this patent application, see: CHUNG, Yul Kyo; LEE, Doo Hwan; LEE, Seung Eun; SHIN, Yee Na. Electronic Component Embedded Substrate and Manufacturing Method Thereof. Filed November 27, 2013 and posted June 5, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=5477&p=110&f=G&l=50&d=PG01&S1=20140529.PD.&OS=PD/20140529&RS=PD/20140529

Keywords for this news article include: Semiconductor, Microtechnology, Electronic Components, Samsung Electro-mechanics Co. Ltd..

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Source: Health & Medicine Week


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