The patent's assignee is
News editors obtained the following quote from the background information supplied by the inventors: "Computers include general purpose central processing units (CPUs) or 'processors' that are designed to execute a specific set of system instructions. A group of processors that have similar architecture or design specifications may be considered to be members of the same processor family. Examples of current processor families include the Motorola 680X0 processor family, manufactured by
"Each family of microprocessors executes instructions that are unique to the processor family. The collective set of instructions that a processor or family of processors can execute is known as the processor's instruction set. As an example, the instruction set used by the
"The uniqueness of the processor family among computer systems also typically results in incompatibility among the other elements of hardware architecture of the computer systems. A computer system manufactured with a processor from the
"Computer manufacturers want to maximize their market share by having more rather than fewer applications run on the microprocessor family associated with the computer manufacturers' product line. To expand the number of operating systems and application programs that can run on a computer system, a field of technology has developed in which a given computer having one type of CPU, called a host, will include a virtualizer program that allows the host computer to emulate the instructions of an unrelated type of CPU, called a guest. Thus, the host computer will execute an application that will cause one or more host instructions to be called in response to a given guest instruction, and in this way the host computer can both run software designed for its own hardware architecture and software written for computers having an unrelated hardware architecture.
"As a more specific example, a computer system manufactured by
"When a guest computer system is emulated on a host computer system, the guest computer system is said to be a 'virtual machine' as the guest computer system only exists in the host computer system as a pure software representation of the operation of one specific hardware architecture. The terms virtualizer, emulator, direct-executor, virtual machine, and processor emulation are sometimes used interchangeably to denote the ability to mimic or emulate the hardware architecture of an entire computer system using one or several approaches known and appreciated by those of skill in the art. Moreover, all uses of the term 'emulation' in any form is intended to convey this broad meaning and is not intended to distinguish between instruction execution concepts of emulation versus direct-execution of operating system instructions in the virtual machine. Thus, for example, the Virtual PC software created by
"The virtualizer program acts as the interchange between the hardware architecture of the host machine and the instructions transmitted by the software (e.g., operating systems, applications, etc.) running within the emulated environment. This virtualizer program may be a host operating system (HOS), which is an operating system running directly on the physical computer hardware (and which may comprise a hypervisor, discussed in greater detailed later herein). Alternately, the emulated environment might also be a virtual machine monitor (VMM) which is a software layer that runs directly above the hardware, perhaps running side-by-side and working in conjunction with the host operating system, and which can virtualize all the resources of the host machine (as well as certain virtual resources) by exposing interfaces that are the same as the hardware the VMM is virtualizing. This virtualization enables the virtualizer (as well as the host computer system itself) to go unnoticed by operating system layers running above it.
"To summarize, processor emulation enables a guest operating system to execute on a virtual machine created by a virtualizer running on a host computer system, said host computer system comprising both physical hardware and a host operating system.
"Processor and Memory Topology
"Modern operating system schedulers take into account the processor and memory topology of the machine to maximize performance. This is usually done at startup and, for an operating system executing on physical hardware, this is usually sufficient because the processor topology of physical hardware remains constant. The Windows Operating System (Windows XP, Windows 2003) and other operating systems typically determine the topology of the system at boot time in two ways: (a) by examining the memory and processor node topology information in the BIOS Static Resource Affinity Table (SRAT) and (b) by reading self-contained processor identification data (CPUID in x86/x64 processors) to determine specific Simultaneous Multithreading (SMT, a.k.a. hyperthreading) and multicore topologies.
"As used herein, the term 'processor topology' is broadly intended to refer to physical characteristics of the processor and associated memory that, if known by an operating system, could theoretically enable an operating system to better utilize the associated processor resources. Processor topology may include, but is not limited to, the following: static processor information such as SMT, multicore, and BIOS' SRAT data and/or information; static NUMA information such as processor, memory, and I/O resource arrangements; and any changes to the foregoing.
"In a virtual machine environment, however, while the physical processor topology for the 'hosting agent' (the host operating system, virtual machine monitor, and/or hypervisor) remains constant, the physical resources assigned to a virtualizer, and thus the virtual machine, may vary rapidly over time, making the topology assumptions made by the guest operating system running on the virtual machine inaccurate and hence inefficient.
"While the dynamic nature of the topology can be mitigated by always using the same physical processor assignments for virtual processors or by limiting the assignments to a specific node, this would severely and negatively impact the virtualizer's ability to make optimal use of all host resources. Therefore, what is needed in the art is means for rectifying the inefficiency of a changing virtual topology without negatively impacting the virtualizers ability to make optimal use of all host resources."
As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "Various embodiments of the present invention are directed to systems and methods for making a guest operating system aware of the topology of the subset of host resources currently assigned to it. For certain of these embodiments, at virtual machine boot time a Static Resource Affinity Table (SRAT) will be used by the virtualizer to group guest physical memory and guest virtual processors into virtual nodes. Thereafter the host physical memory behind a virtual node can be changed by the virtualizer as necessary, and the virtualizer will provide physical processors appropriate for the virtual processors in that node.
BRIEF DESCRIPTION OF THE DRAWINGS
"The foregoing summary, as well as the following detailed description of preferred embodiments, is better understood when read in conjunction with the appended drawings. For the purpose of illustrating the invention, there is shown in the drawings exemplary constructions of the invention; however, the invention is not limited to the specific methods and instrumentalities disclosed. In the drawings:
"FIG. 1 is a block diagram representing a computer system in which aspects of the present invention may be incorporated;
"FIG. 2 is a block diagram representing the logical layering of the hardware and software architecture for an emulated operating environment in a computer system;
"FIG. 3A is a block diagram representing a virtualized computing system wherein the emulation is performed by the host operating system (either directly or via a hypervisor);
"FIG. 3B is a block diagram representing an alternative virtualized computing system wherein the emulation is performed by a virtual machine monitor running side-by-side with a host operating system;
"FIG. 4 is a block diagram illustrating a multi-core processor and a NUMA two-node system for which several embodiments of the present invention may be utilized;
"FIG. 5 is a process flow diagram illustrating one method by which a virtualizer provides dynamic processor topology information for the guest operating system in virtual machine memory for certain embodiments of the present invention; and
"FIG. 6 is a block diagram that illustrates a two-tier disclosing and hinting approach for several embodiments of the present invention."
For additional information on this patent application, see: Traut,
Keywords for this news article include: Software,
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