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Researchers Submit Patent Application, "Random Access Memory Device and Manufacturing Method for Nodes Thereof", for Approval

May 14, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Washington, D.C., VerticalNews journalists report that a patent application by the inventors LEE, TZUNG-HAN (TAIPEI CITY, TW); HUANG, CHUNG-LIN (TAOYUAN COUNTY, TW), filed on March 15, 2013, was made available online on May 1, 2014.

The patent's assignee is Inotera Memories, Inc.

News editors obtained the following quote from the background information supplied by the inventors: "The instant disclosure relates to a semi-conductor device and a manufacturing method thereof; more particular, to a random access memory (RAM) device and a manufacturing method for the nodes thereof.

"Today's semiconductor industry gradually tends to the miniaturized design, so that the adjacent components disposed on the substrate have a narrowing distance. Please refer to FIGS. 1 and 1A, which show a conventional RAM device. The conventional RAM device has a substrate 1a, an insulating layer 2a, and an isolation layer 3a. The substrate 1a is defines as a plurality of active areas 11a by the isolation layer 3a. The insulating layer 2a is etched to form two holes 21a. That is to say, the intermediate portion 22a of the insulating layer 2a, which is disposed on the isolation layer 3a, separates the two holes 21a, and each hole 21 is used for being filling to form a node (not shown).

"However, when forming the holes 21, the bottom of the intermediate portion 22a of the insulating layer 2a is etched to form a lateral etching area 23a. That is to say, the width of the intermediate portion 22a is gradually reduced from the top of the intermediate portion 22a to the isolation layer 3a, so that the distance between the nodes, which are arranged at two opposite sides of the intermediate portion 22a, is gradually reduced to cause short circuit therebetween easily.

"To achieve the abovementioned improvement, the inventors strive via industrial experience and academic research to present the instant disclosure, which can provide additional improvement as mentioned above."

As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "One embodiment of the instant disclosure provides a RAM device and a manufacturing method for the nodes of the RAM device, wherein the manufacturing method prevents from the short circuit between the adjacent nodes at a precondition, which is the RAM device achieving the miniaturization requirements.

"The manufacturing method for the nodes of the RAM device, includes: forming a shallow trench isolation (STI) layer on a substrate to divide the substrate into a plurality of active areas, wherein the adjacent portions of any two adjacent active areas and the portion of the STI layer arranged therebetween are defined as a unit region; sequentially forming a first insulating layer and a hard mask layer on the substrate, wherein the hard mask layer has a specific pattern; etching the first insulating layer of each unit region to form a first hole for exposing the STI layer of each unit region and partial of the active areas of each unit region; filling a conductive material in the first hole of each unit region to form a conductor; forming a protective layer on the top surface of the conductor of each unit region, wherein each protective layer has an opening aligning the STI layer of each unit region; etching the conductor of each unit region from the opening until the STI layer to form a second hole for exposing the STI layer of each unit region, wherein the aperture of the second hole is smaller than the aperture of the first hole, each conductor is divided into two nodes by the second hole arranged therebetween, and each node is used for electrically connecting to a capacitor; and forming a second insulating layer in the second hole of each unit region for electrically isolating the nodes of each unit region.

"The random access memory (RAM) device is formed by the above manufacturing method.

"Base on the above, at the precondition, which is the RAM device achieving the miniaturization requirements, the manufacturing method uses the laterally etching phenomenon by arranging the steps to form the protrusion of the second insulating layer for preventing from the short circuit between the adjacent nodes.

"In order to further appreciate the characteristics and technical contents of the instant disclosure, references are hereunder made to the detailed descriptions and appended drawings in connection with the instant disclosure. However, the appended drawings are merely shown for exemplary purposes, rather than being used to restrict the scope of the instant disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

"FIG. 1 is a perspective view of a conventional RAM device;

"FIG. 1A is an enlarge view of FIG. 1;

"FIG. 2 is a perspective view of the step 110 of the manufacturing method of the instant disclosure;

"FIG. 2A is a sectional view of FIG. 2;

"FIG. 3 is a perspective view of the steps 120 and 130 of the manufacturing method of the instant disclosure;

"FIG. 3A is a perspective view of the forming of the photoresist layer of the instant disclosure;

"FIG. 4 is a perspective view of the step 140 of the manufacturing method of the instant disclosure;

"FIG. 5 is a perspective view of the step 150 of the manufacturing method of the instant disclosure;

"FIG. 6 is a perspective view of the step 160 of the manufacturing method of the instant disclosure;

"FIG. 7 is a perspective view of the step 170 of the manufacturing method of the instant disclosure;

"FIG. 8 is a perspective view of the step 180 of the manufacturing method of the instant disclosure;

"FIG. 8A is an enlarge view of FIG. 8; and

"FIG. 9 is a circuit view of the RAM device of the instant disclosure."

For additional information on this patent application, see: LEE, TZUNG-HAN; HUANG, CHUNG-LIN. Random Access Memory Device and Manufacturing Method for Nodes Thereof. Filed March 15, 2013 and posted May 1, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=4925&p=99&f=G&l=50&d=PG01&S1=20140424.PD.&OS=PD/20140424&RS=PD/20140424

Keywords for this news article include: Electronics, Random Access Memory, Inotera Memories Inc..

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Source: Electronics Newsweekly