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Researchers Submit Patent Application, "Method for Producing Singulated Semiconductor Devices", for Approval

May 14, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Washington, D.C., VerticalNews journalists report that a patent application by the inventors Ploessl, Andreas (Regensburg, DE); Zull, Heribert (Regensburg, DE), filed on August 23, 2013, was made available online on May 1, 2014.

No assignee for this patent application has been made.

News editors obtained the following quote from the background information supplied by the inventors: "Semiconductor components are typically formed jointly on a wafer-type semiconductor substrate having a stable thickness. The semiconductor wafer is furthermore thinned and severed in predefined separating regions, as a result of which individual components are present. For components having both front-side and rear-side contacts, for example, luminescence diode chips, a metal-semiconductor contact is formed at a rear side of the semiconductor wafer after thinning.

"For singulation it is possible to carry out sawing or separation by grinding, or laser cutting. However, such separating processes can lead to crystal damage, which is associated with a risk of breaking in the case of relatively thin components or chips. In order to avoid this and in order to produce chips that are more stable, provision can be made for etching separating trenches. In this regard, anisotropic dry etching processes afford sufficiently high etching rates on semiconductor materials. What is problematic however, is the severing of metallic layers, for which dry or plasma etching is unsuitable.

"One possible approach consists in processing a semiconductor substrate as usual, preparing the front side in the separating regions to be free of metal, thinning the substrate, providing the rear side with a metal-semiconductor contact (and possible further layers), and mounting with the rear side onto a film. Afterward, separating trenches can be produced from the front side in an anisotropic etching process, wherein the trench etching can stop on the metallic contact layer at the rear side. The singulation can be completed by carrying out wet-chemical etching of the rear-side metal or tearing the latter by expanding the film. However, this results in an unstable manufacturing process.

"Alternatively, provision can be made for photolithographically patterning the metal layer before the separating trenches are etched. However, this requires complex front to rear side alignment and, owing to the presence of the thin semiconductor substrate, can result in the latter breaking. In order to avoid this, consideration can be given to connecting the semiconductor substrate to a stabilizing auxiliary substrate. This approach increases the outlay, and can likewise lead to losses of yield when the auxiliary substrate is removed."

As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "Embodiments of the present invention specify an improved method for producing singulated semiconductor components.

"In accordance with one aspect of the invention, a method for producing singulated semiconductor components is proposed. The method comprises providing a starting substrate, and carrying out an etching process for forming depressions at a side of the starting substrate. The depressions are arranged in the region of the semiconductor components to be produced. Walls present between the depressions are arranged in the region of separating regions provided for severing the starting substrate. The method furthermore comprises forming a metallic layer on the side of the starting substrate with the depressions and walls, and carrying out a further etching process for severing the starting substrate in the separating regions and forming the singulated semiconductor components.

"Instead of thinning a substrate at an entire side and subsequently severing it, as is the case in conventional singulation methods, the method involves forming depressions in the starting substrate before severing, said depressions being arranged in the region of the semiconductor components to be produced. The depressions are therefore situated at those regions of the starting substrate from which (subsequently) the individual components emerge. The separating regions for severing the starting substrate are provided between these substrate regions. As a result of forming the depressions, it is possible for the starting substrate to be thinned to a final thickness provided for the semiconductor components. Substrate material that has remained in this method stage in the form of the walls which extend between the depressions or separate the depressions from one another ensures that the partly thinned starting substrate can still have a relatively high stability. This benefits processes such as the subsequent formation of the metallic layer and the severing of the starting substrate in the predefined separating regions, said severing being carried out for the purpose of singulation.

"In the method, etching processes are used to form the depressions and to carry out the (actual) severing of the starting substrate. In this way, the singulation can be effected without mechanical stress (crystal damage) of the semiconductor components, as a result of which the semiconductor components can have a high stability. As a result, it is furthermore possible to form the semiconductor components with a relatively small thickness. The method can furthermore be carried out in a cost-effective manner and without employing an expensive auxiliary substrate for stabilization.

"In accordance with one embodiment, provision is made for the starting substrate to be a coated carrier substrate composed of a semiconductor material. The carrier substrate has a layer arrangement arranged at a first side. The depressions are formed at a second side of the carrier substrate, said second side being opposite the first side. The layer arrangement can comprise a component layer or useful layer suitable for the components to be produced, for example, having a semiconductor layer sequence. If appropriate, the layer arrangement can furthermore comprise an intermediate layer present between the useful layer and the carrier substrate.

"Such an embodiment comprising a coated carrier substrate may be appropriate, for example, for the production of optoelectronic semiconductor components. These include luminescence diodes, for example. For components of this type, the layer arrangement arranged on the carrier substrate comprises a useful layer for luminescence diodes.

"In an alternative embodiment, the layer arrangement comprises a useful layer for concentrator solar cells in order to be able to produce such solar cells.

"In the case of luminescence diodes and in the case of concentrator solar cells, the associated useful layer can be present in the form of a semiconductor layer sequence which is produced on an epitaxy substrate with the aid of an epitaxy method and is subsequently applied or transferred to the carrier substrate. Further processes (for example, forming further layers on the useful layer, patterning processes) can be carried out before the layer transfer. Afterward, the epitaxy substrate can be removed or eroded.

"For semiconductor components, for example, luminescence diodes, the abovementioned small thickness that can be achieved with the aid of the production method enables the presence of a low thermal resistance between the layer arrangement (comprising an electronically or optoelectronically used active component layer) arranged in the region of the first side of the carrier substrate and the opposite second side of the carrier substrate. As a result, relatively good heat dissipation can be achieved, as a result of which it is possible to operate the components with higher power for the same efficiency in comparison with thicker components.

"In a further embodiment, the method furthermore comprises patterning the layer arrangement arranged on the first side of the carrier substrate into individual layer sections. The layer sections are arranged (like the depressions at the second side of the carrier substrate) in the region of the semiconductor components to be produced. Cutouts present between the layer sections are arranged (like the walls at the second side) in the region of the separating regions provided for severing. In this embodiment, the separate layer sections can constitute pre-patterned components which are (still) connected to one another via the carrier substrate. After the patterning of the layer arrangement, the first side of the carrier substrate in the cutouts between the layer sections can be uncoated or exposed, as a result of which the etching process provided for severing the substrate can be made possible or fostered.

"The patterning of the layer arrangement into the separate layer sections can be effected, for example, before the etching process for forming the depressions is carried out. These two processes carried out at the opposite sides of the substrate (and their local coordination or alignment with respect to one another) can be carried out on the carrier substrate having (still) a relatively large thickness. In this way, it is possible to reliably avoid the risk of the substrate breaking.

"In a further embodiment, the metallic layer is formed on the substrate side with the depressions and walls in such a way that side regions of the walls are exposed. In this embodiment, the metallic layer can be formed in sections in regions separated from one another, i.e., in the region of the depressions and on the walls in the region of the ends thereof. Sections of the metallic layer in the region of the depressions can form corresponding contacts or rear-side contacts in the (subsequently singulated) semiconductor components. As a result of such patterned formation of the metallic layer, which can be fostered, for example, by directional application (for example, vapor deposition), it is possible to avoid a separating step for severing the metallic layer.

"In a further embodiment, the method comprises removing the walls present between the depressions. An etching process, for example, can be carried out for this purpose.

"It is possible for this to involve the etching process carried out for severing the starting or carrier substrate, i.e., for the removal of the walls and the severing to be able to take place in a common etching process. In this way, the production method can be carried out relatively rapidly and with a relatively low outlay.

"However, it is also possible to carry out separate etching processes, wherein the removal of the walls is carried out before the severing of the substrate. In this way, it is possible to ensure, for example, that the removal of the walls cannot result in impairment of the severing (for example, as a result of detached material of the metallic layer).

"For removing the walls with the aid of an etching process, the above-described formation of the metallic layer according to which side regions of the walls are exposed can prove to be advantageous. This makes it possible that an etching attack can be effected via the uncoated side regions of the walls, as a result of which the walls together with that part of the metallic layer which is situated thereon can be removed.

"In a further embodiment, provision is made for carrying out the removal of the walls (before the substrate is severed) with the aid of a polishing or grinding process. A part of the metallic layer that is situated on the walls can be concomitantly removed during polishing.

"It is possible to carry out, instead of complete removal, only partial removal of the walls, including a part of the metallic layer that is arranged thereon, by etching or polishing. By way of example, the walls can be partly eroded by polishing in order to prepare the walls for faster removal by etching that is carried out subsequently.

"In a further embodiment, a part of the metallic layer that is formed on the walls is removed. What can be achieved as a result is that it is possible to avoid impairment of a subsequent process by a metal mask present in this region. Such a subsequent process is, for example, the removal of the walls and/or the severing of the substrate.

"By way of example, a lift-off process may be appropriate for removing that part of the metallic layer which is formed on the walls. In such a process, a patterned etching or photoresist mask used for forming the depressions can be employed, which is (initially) not removed, such that the metallic layer in the region of the walls is arranged thereon. By dissolving the mask, for example, by employing a solvent, it is possible for that part of the metallic layer which is situated on the walls to be lifted off.

"Instead of a lift-off process, the removal of the metallic layer present in the region of the walls can, as indicated above, also be carried out together with the (if appropriate only partial) removal of the walls (by etching or polishing).

"In the singulated semiconductor components, the metallic layer can be used both for mechanical connection and for making electrical contact with mating contacts (for example, of a carrier, a circuit board, a housing, a package, etc.). In this case, the metallic layer can serve as a rear-side contact layer of the semiconductor components. With regard to luminescence diodes, the metallic layer can be embodied, for example, in the form of a stack comprising a metal/semiconductor contact and further metallic partial layers. The semiconductor components can accordingly be formed in each case with an associated front-side contact. Alternatively, it is possible for the metallic layer to be used only for producing mechanical contacts and thus for mechanical connection, and in this sense to serve for example only as a rear-side solder layer. In such a configuration, the semiconductor components can be formed only with electrical front-side contacts.

"The semiconductor components can furthermore be formed with a customary rectangular or square contour. Owing to the use of etching processes, the production method furthermore affords the possibility of deviating from the rectangular geometry and providing other lateral shapes which afford for example the advantage of better area utilization. One geometry that is appropriate in this regard is a hexagonal shape. In a further embodiment, provision is accordingly made for forming the depressions in the region of the semiconductor components to be produced with a hexagonal shape. This can likewise apply to the layer sections formed from the layer arrangement (on the other side of the substrate).

"In a further embodiment, the etching process for forming the depressions and the etching process for severing the starting substrate in each case comprise anisotropic dry etching. As a result, the relevant etching processes can be carried out with a relatively high speed and accuracy. By way of example, a deep reactive ion etching process can be carried out in each case.

"In a further embodiment, the etching process for forming the depressions is monitored with the aid of an interferometric measurement. In this way, the erosion depth and thus the final thickness that is provided for the semiconductor components and is dependent on said depth can be set with a high accuracy.

"This applies in the same way to a further embodiment, according to which the etching process for forming the depressions is carried out in a time-monitored manner.

"The method and its embodiments can also be employed for producing components other than luminescence diodes or concentrator solar cells. One possible example is the production of laser diodes. In this case, the starting substrate can be a coated carrier substrate having, at a first side, a layer arrangement comprising a component layer or useful layer for laser diodes.

"A further example is the production of silicon components, for example, integrated circuits. In this case, the starting substrate can be a carrier substrate having, at a first side, corresponding components, i.e., electrical and/or electronic structures, circuit structures, contacts, etc. The depressions and the metallic layer can be formed at an opposite second side of the substrate.

"The advantageous embodiments and developments of the invention explained above and/or reproduced in the dependent claims can be employed--apart from, for example, in the cases of unambiguous dependencies or incompatible alternatives--individually or else in any desired combination with one another.

BRIEF DESCRIPTION OF THE DRAWINGS

"The above-described properties, features and advantages of this invention and the way in which they are achieved will become clearer and more clearly understandable in association with the following description of exemplary embodiments which are explained in greater detail in association with the schematic drawings, in which:

"FIG. 1 shows a substrate with an arrangement comprising a patterned useful layer and an intermediate layer at a front side of the substrate;

"FIG. 2 shows the substrate after the intermediate layer has been patterned as a result of which separate layer sections are present for semiconductor components to be produced;

"FIG. 3 shows a plan view illustration of the front side of the substrate;

"FIGS. 4 to 8 show possible embodiments of the layer sections for the components with different front-side contacts;

"FIG. 9 shows the substrate after the production of depressions at a rear side of the substrate, wherein the depressions are separated from one another by web-shaped walls;

"FIG. 10 shows a plan view illustration of the rear side of the substrate;

"FIG. 11 shows the substrate with a metallic layer formed on the rear side;

"FIG. 12 shows the substrate after the walls have been removed;

"FIG. 13 shows semiconductor components that have emerged from the substrate as a result of a singulation;

"FIG. 14 shows a further illustration of the substrate after removal of the walls, wherein V-shaped etching regions are present at the rear side;

"FIG. 15 shows a further illustration of the substrate, wherein the metallic layer has been removed from the walls;

"FIG. 16 shows a further illustration of the substrate, wherein the walls have been partly eroded; and

"FIG. 17 shows a flow chart for elucidating steps of a method for producing singulated semiconductor components."

For additional information on this patent application, see: Ploessl, Andreas; Zull, Heribert. Method for Producing Singulated Semiconductor Devices. Filed August 23, 2013 and posted May 1, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=2354&p=48&f=G&l=50&d=PG01&S1=20140424.PD.&OS=PD/20140424&RS=PD/20140424

Keywords for this news article include: Patents, Semiconductor, Optoelectronics.

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Source: Electronics Newsweekly


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