The assignee for this patent application is
Reporters obtained the following quote from the background information supplied by the inventors: "Various data processing systems have been developed including storage systems, cellular telephone systems, and radio transmission systems. In such systems, data is transferred from a sender to a receiver via a medium. For example, in a storage system, data is sent from a sender (e.g., a write function) to a receiver (e.g., a read function) via a storage medium. As information is stored and transmitted in the form of digital data, errors are introduced that, if not corrected, can corrupt the data and render the information unusable. The effectiveness of any transfer is impacted by any losses in data caused by various factors.
"Consequently, error checking systems have been developed to detect and correct errors of digital data. Error checking systems are used, for example, to process data retrieved from a magnetic hard disk drive (HDD). Each data sector of the disk drive has different noise, jitter, and distortion characteristics or signal to noise ratios (SNR), due, for example, to magnetic media defects, off-track writing, high fly height of magnetic write heads during a writing operation, large phase disturbance, and so forth. The throughput of an HDD can be affected by the number of read errors in a data sector, based in part on the SNR, and by the speed at which the read channel can recover from a read error by correcting the errors."
In addition to obtaining background information on this patent application, VerticalNews editors also obtained the inventors' summary information for this patent application: "A system is described for constructing maximum transition run modulation code based upon a multi-level run-length limited finite state machine. A processor is configured to receive information from a hard disk drive via a read channel and recover data from the hard disk drive using maximum transition run modulation code. A memory has computer executable instructions configured for execution by the processor to model a magnetic recording channel as a partial response channel, model a source of information to the magnetic recording channel to provide an optimized Markov source, and construct a maximum transition run modulation code to mimic the optimized Markov source based upon a finite state machine having a limited transition run length and a multi-level periodic structure.
"This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
"The detailed description is described with reference to the accompanying figures. In the figures, the left-most digit(s) of a reference number identifies the figure in which the reference number first appears. The use of the same reference number in different instances in the description and the figures may indicate similar or identical items.
"FIG. 1A is a block diagram illustrating a Markov source optimization for a magnetic recording channel in accordance with embodiments of the disclosure.
"FIG. 1B is a block diagram illustrating a Markov source optimization, where data dependent autoregressive (AR) modeling is used to model a magnetic recording channel in accordance with embodiments of the disclosure.
"FIG. 2A is a diagrammatic illustration of a finite state machine (FSM) for maximum transition run (MTR) code where j=4 (mtr4 code) in accordance with embodiments of the disclosure.
"FIG. 2B is a diagrammatic illustration of a single level mtr4 FSM with two time ticks in accordance with embodiments of the disclosure.
"FIG. 3 is a diagrammatic illustration of an FSM with a multi-level (ML) periodic structure, where a timeline is included in accordance with embodiments of the disclosure.
"FIG. 4 is a flow diagram illustrating a method for constructing MTR modulation code, e.g., for recovering data from a hard disk drive (HDD) in accordance with embodiments of the disclosure.
"FIG. 5 is a block diagram illustrating a storage system having information divergence based data processing circuitry in accordance with embodiments of the disclosure.
"FIG. 6 is a block diagram illustrating a data transmission system having information divergence based data processing circuitry in accordance with embodiments of the disclosure."
For more information, see this patent application: Chang, Wu; Karabed, Razmik; Yang, Shaohua; Zhang, Fan. Multi-Level Run-Length Limited Finite State Machine for Magnetic Recording Channel. Filed
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