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Japan : Fujitsu Awarded Imperial Invention Prize for High-Dimensional Supercomputer Interconnect Technology

May 30, 2014



Fujitsu today announced that its invention of high-dimensional interconnect technology, which is used in the K computer Fujitsu jointly developed with RIKEN as well as the company's own FUJITSU Supercomputer PRIMEHPC FX10, was awarded the Imperial Invention Prize. This prize is given to the most outstanding invention at the National Commendation for Invention sponsored by the Japan Institute of Invention and Innovation.

The award ceremony is scheduled to be held on July 8, 2014, at the Hotel Okura Tokyo.

Today, the world's top supercomputers are massively parallel computers with processors connected to up to tens of thousands of nodes. In massively parallel computers, if there is a failure in any of the compute notes, the failed nodes are isolated and the operation of the system is maintained, but the isolation method affects overall system performance and availability. In conventional node structures, pre-partitioned meshes are connected by switches, and when there is a failure, each partition that includes a failed node will be isolated. However, as a result, nodes that have not failed are also included in the isolated partitions, leading to a decline in system availability.

To overcome this problem, Fujitsu invented high-dimensional interconnect technology that does not employ partitioning switches. This technology enables failed nodes to be circumvented, no decline in the level of parallelism that can be executed, and a high level of system availability to be maintained. This technology is being used in the K computer, which interconnects 88,128 nodes, and which was named the world's top-performing supercomputer in the 37th and 38th editions of the TOP500 List(3) of the world's top supercomputers in 2011. In addition to the K computer, this technology is employed in the PRIMEHPC FX10, which is deployed in academic institutions and corporations around the world and is also being used in the successor model of the PRIMEHPC FX10, which is currently under development.

Imperial Invention Prize: Yuichiro Ajima, Senior Architect, Next Generation Technical Computing Unit Imperial Invention Prize: Tomohiro Inoue, Manager, Next Generation Technical Computing Unit Imperial Invention Prize: Shinya Hiramoto, Next Generation Technical Computing Unit Distinguished Service Prize for Employment of Invention: Masami Yamamoto, President and Representative Director

This invention is comprised of a predetermined number of nodes that are grouped together on a grid, with the groups linked together using a torus connection configuration. A torus is a structure in which multiple groups are connected in a ring configuration, with the rings connecting different groups combined in a grid. With this invention, the partitioning of the group can be positioned where one chooses.


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Source: TendersInfo (India)


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