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Patent Issued for Saving of Data in Cases of Word-Line to Word-Line Short in Memory Arrays

June 3, 2014



By a News Reporter-Staff News Editor at Journal of Technology -- From Alexandria, Virginia, VerticalNews journalists report that a patent by the inventors Koh, Pao-Ling (Fremont, CA); Kuo, Tien-Chien (Sunnyvale, CA), filed on March 2, 2012, was published online on May 20, 2014.

The patent's assignee for patent number 8730722 is SanDisk Technologies Inc. (Plano, TN).

News editors obtained the following quote from the background information supplied by the inventors: "Solid-state memory capable of nonvolatile storage of charge, particularly in the form of EEPROM and flash EEPROM packaged as a small form factor card, has recently become the storage of choice in a variety of mobile and handheld devices, notably information appliances and consumer electronics products. Unlike RAM (random access memory) that is also solid-state memory, flash memory is non-volatile and retains its stored data even after power is turned off. In spite of the higher cost, flash memory is increasingly being used in mass storage applications. Conventional mass storage, based on rotating magnetic medium such as hard drives and floppy disks, is unsuitable for the mobile and handheld environment. This is because disk drives tend to be bulky, are prone to mechanical failure and have high latency and high power requirements. These undesirable attributes make disk-based storage impractical in most mobile and portable applications. On the other hand, flash memory, both embedded and in the form of a removable card, are ideally suited in the mobile and handheld environment because of its small size, low power consumption, high speed and high reliability features."

As a supplement to the background information on this patent, VerticalNews correspondents also obtained the inventors' summary information for this patent: "According to a first set of aspects, a method of operating a non-volatile memory device is presented. The memory device includes an array of non-volatile memory cells formed along a plurality of bit lines and a plurality of word lines and, for each of the bit lines, a corresponding plurality of data latches connected to them whereby multi-state can be programmed into a selected word line according to data held in the corresponding data latches. The method includes receiving a first page of data and storing the received first page of data in a first of the data latches for each of the corresponding bit lines. The first page of data is written from the first of the data latches into a first word line in a binary format. After storing the received first page of data in the first of the data latches for each of the corresponding bit lines, a second page of data is received. After writing the first page of data into the first word line and receiving the second page of data, the first page of data is read from the first word line into a second of the data latches for each of the corresponding bit lines. Subsequent to writing the first page of data into the first word line, the received second page of data is stored in a third of the data latches for each of the corresponding bit lines, where the third of the data latches is different from the second of the data latches for each of the corresponding bit lines. The second page of data is written from the third of the data latches into a second word line in a binary format, where the second word line is adjacent to the first word line. After writing the second page of data into the second word line, the first page of data is held in the second of the data latches for each of the corresponding bit lines and the second page of data is held in the third of the data latches for each of the corresponding bit lines.

"In other aspects, a method of operating a non-volatile memory device is presented. The memory device includes an array of non-volatile memory cells formed along a plurality of bit lines and a plurality of word lines and, for each of the bit lines, has a corresponding plurality of data latches connected to the bit lines whereby multi-state can be programmed into a selected word line according to data held in the corresponding data latches. The method includes: receiving and storing a first page of data in a first of the data latches for each of the corresponding bit lines; transferring the first page of data from the first of the data latches into a second of the data latches for each of the corresponding bit lines; and writing the first page of data from the second of the data latches into a first word line in a binary format. The method further includes receiving and storing a second page of data in the first of the data latches for each of the corresponding bit lines and, subsequent to writing the first page of data into the first word line, transferring the first page of data from the second of the data latches into a third of the data latches for each of the corresponding bit lines. Subsequent to transferring the first page of data into the third of the data latches for each of the corresponding bit lines, the second page of data is transferred from the first of the data latches into the second of the data latches for each of the corresponding bit lines. A third page of data is subsequently received and stored in the first of the data latches for each of the corresponding bit lines. The second page of data is written from the second of the data latches into a second word line in a binary format, where the second word line is adjacent to the first word line. Subsequent to writing the second page of data into the second word line, the first page of data is held in the third of the data latches for each of the corresponding bit lines, the second page of data is held in the second of the data latches for each of the corresponding bit lines, and the third page age of data is held in the first of the data latches for each of the corresponding bit lines.

"In further aspects, a method of operating a non-volatile memory device. The memory device includes an array of non-volatile memory cells formed along a plurality of bit lines and a plurality of word lines and, for each of the bit lines, has a corresponding plurality of (N+2) data latches connected thereto whereby multi-state can be programmed into a selected word line according to data held in the corresponding data latches. N is an integer 2 or greater. The method includes initiating a N-state write operation into a first word line for N pages of data from N of the data latches for each of the corresponding bit lines using an (N+1)st of the data latches of the corresponding bit lines to partially inhibit programming in response to verifying at a low verify level and subsequently suspending the N-state write operation while maintaining the N pages of data in the N of the data latches for each of the corresponding bit lines. While the N-state write operation is suspended and while maintaining the N pages of data in the N of the data latches for each of the corresponding bit line, the method also includes: reading a first page of binary data written in binary format from a second word line into the (N+1)st of the data latches of the corresponding bit lines overwriting the content thereof, wherein the first and second word lines are different; receiving in the (N+2)nd of the data latches of the corresponding bit lines a second page of binary data; and subsequently writing in a binary format the second page of binary data from the (N+2)nd of the data latches of the corresponding bit lines into a third word line adjacent to the second word line while maintaining the first page of binary in the (N+1)st of the data latches of the corresponding bit lines, where the third word line is different than the first word line. The N-state write operation is subsequently resumed and includes reestablishing the content of the (N+1)st of the data latches of the corresponding bit lines.

"Various aspects, advantages, features and embodiments of the present invention are included in the following description of exemplary examples thereof, whose description should be taken in conjunction with the accompanying drawings. All patents, patent applications, articles, other publications, documents and things referenced herein are hereby incorporated herein by this reference in their entirety for all purposes. To the extent of any inconsistency or conflict in the definition or use of terms between any of the incorporated publications, documents or things and the present application, those of the present application shall prevail."

For additional information on this patent, see: Koh, Pao-Ling; Kuo, Tien-Chien. Saving of Data in Cases of Word-Line to Word-Line Short in Memory Arrays. U.S. Patent Number 8730722, filed March 2, 2012, and published online on May 20, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=56&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=2765&f=G&l=50&co1=AND&d=PTXT&s1=20140520.PD.&OS=ISD/20140520&RS=ISD/20140520

Keywords for this news article include: Legal Issues, SanDisk Technologies Inc..

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Source: Journal of Technology


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