News Column

Researchers Submit Patent Application, "Stacked Chip-On-Board Module with Edge Connector", for Approval

June 4, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Washington, D.C., VerticalNews journalists report that a patent application by the inventors Zohni, Wael (San Jose, CA); Haba, Belgacem (Saratoga, CA), filed on January 16, 2014, was made available online on May 22, 2014.

The patent's assignee is Tessera, Inc.

News editors obtained the following quote from the background information supplied by the inventors: "The present invention relates to stacked microelectronic assemblies and methods of making such assemblies, and to components useful in such assemblies.

"Semiconductor chips are commonly provided as individual, prepackaged units. A standard chip has a flat, rectangular body with a large front face having contacts connected to the internal circuitry of the chip. Each individual chip typically is mounted in a package which, in turn, is mounted on a circuit panel such as a printed circuit board and which connects the contacts of the chip to conductors of the circuit panel. In many conventional designs, the chip package occupies an area of the circuit panel considerably larger than the area of the chip itself.

"As used in this disclosure with reference to a flat chip having a front face, the 'area of the chip' should be understood as referring to the area of the front face. In 'flip chip' designs, the front face of the chip confronts the face of a package substrate, i.e., the chip carrier, and the contacts on the chip are bonded directly to contacts of the chip carrier by solder balls or other connecting elements. In turn, the chip carrier can be bonded to a circuit panel through terminals overlying the front face of the chip. The 'flip chip' design provides a relatively compact arrangement; each chip occupies an area of the circuit panel equal to or slightly larger than the area of the chip's front face, such as disclosed, for example, in certain embodiments of commonly-assigned U.S. Pat. Nos. 5,148,265; 5,148,266; and 5,679,977, the disclosures of which are incorporated herein by reference.

"Certain innovative mounting techniques offer compactness approaching or equal to that of conventional flip-chip bonding. Packages which can accommodate a single chip in an area of the circuit panel equal to or slightly larger than the area of the chip itself are commonly referred to as 'chip-sized packages.'

"Besides minimizing the planar area of the circuit panel occupied by microelectronic assembly, it is also desirable to produce a chip package that presents a low overall height or dimension perpendicular to the plane of the circuit panel. Such thin microelectronic packages allow for placement of a circuit panel having the packages mounted therein in close proximity to neighboring structures, thus reducing the overall size of the product incorporating the circuit panel.

"Various proposals have been advanced for providing plural chips in a single package or module. In the conventional 'multi-chip module,' the chips are mounted side-by-side on a single package substrate, which in turn can be mounted to the circuit panel. This approach offers only limited reduction in the aggregate area of the circuit panel occupied by the chips. The aggregate area is still greater than the total surface area of the individual chips in the module.

"It has also been proposed to package plural chips in a 'stack' arrangement, i.e., an arrangement where plural chips are placed one on top of another. In a stacked arrangement, several chips can be mounted in an area of the circuit panel that is less than the total area of the chips. Certain stacked chip arrangements are disclosed, for example, in certain embodiments of the aforementioned U.S. Pat. Nos. 5,679,977; 5,148,265; and U.S. Pat. No. 5,347,159, the disclosure of which is incorporated herein by reference. U.S. Pat. No. 4,941,033, also incorporated herein by reference, discloses an arrangement in which chips are stacked on top of another and interconnected with one another by conductors on so-called 'wiring films' associated with the chips.

"Despite the advances that have been made in multi-chip packages, there is still a need for improvements in order to minimize the size and improve the performance of such packages. These attributes of the present invention are achieved by the construction of the microelectronic assemblies as described hereinafter."

As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "In accordance with an aspect of the invention, a module can include a module card and first and second microelectronic elements having front surfaces facing a first surface of the module card. The module card can also have a second surface and a plurality of parallel exposed edge contacts adjacent an edge of at least one of the first and second surfaces for mating with corresponding contacts of a socket when the module is inserted in the socket. Each microelectronic element can be electrically connected to the module card. The front surface of the second microelectronic element can partially overlie a rear surface of the first microelectronic element and can be attached thereto.

"In a particular embodiment, the second microelectronic element can have a plurality of chip contacts exposed at the front surface thereof projecting beyond a lateral edge of the first microelectronic element. In one embodiment, the edge contacts can be exposed at at least one of the first or second surfaces of the module card. In an exemplary embodiment, at least some of the edge contacts can be exposed at the second surface. In a particular embodiment, the module can also include an encapsulant covering the first and second microelectronic elements and a portion of the module card. In one embodiment, the encapsulant can be an overmold. In an exemplary embodiment, at least one of the first and second microelectronic elements can include a memory storage element. In a particular embodiment, at least one of the first and second microelectronic elements can include a DRAM element.

"In one embodiment, the module can also include a plurality of leads extending from chip contacts of the at least one of the first and second microelectronic elements to the edge contacts. The leads can be usable to carry an address signal usable to address the memory storage element in at least one of the first and second microelectronic elements. In a particular embodiment, at least some of the edge contacts can be usable to carry at least one of a signal or a reference potential between the respective edge contact and each of the first and second microelectronic elements. In an exemplary embodiment, the module card can consist essentially of a material having a coefficient of thermal expansion of less than 30 ppm/.degree. C.

"In an exemplary embodiment, the module can also include a spacer extending between the front surface of the second microelectronic element and the first surface of the module card. The spacer can have substantially the same thickness in a vertical direction substantially perpendicular to the first surface as the first microelectronic element. In one embodiment, the module can also include a compliant die attachment adhesive bonding the front surface of the first microelectronic element to the first surface of the module card. In a particular embodiment, the first microelectronic element can be flip-chip bonded to the module card. In an exemplary embodiment, the second microelectronic element can be flip-chip bonded to the module card.

"In a particular embodiment, the module card can also include an aperture extending between the first and second surfaces. The module can also include a plurality of leads extending within the aperture from chip contacts of at least one of the first and second microelectronic elements to the edge contacts. In one embodiment, the aperture can be aligned with the chip contacts of the at least one of the first and second microelectronic elements. In an exemplary embodiment, the aperture can be aligned with the chip contacts of the first and second microelectronic elements. In a particular embodiment, the leads can extend along the first surface. In one embodiment, the leads can extend along the second surface.

"In one embodiment, the aperture can have a long dimension extending in a direction away from an edge of the module card. In an exemplary embodiment, the aperture can be a first aperture, and the module card can also include a second aperture extending between the first and second surfaces. Each of the first and second apertures can be aligned with the chip contacts of the respective first and second microelectronic elements. In a particular embodiment, the module can also include an encapsulant covering portions of the leads between the chip contacts and the module card. In one embodiment, the leads can include conductive elements on the module card and wire bonds extending from the conductive elements to the chip contacts of the at least one of the first and second microelectronic elements.

"In an exemplary embodiment, the leads can include conductive elements on the module card and lead bonds extending from the conductive elements to the chip contacts of the at least one of the first and second microelectronic elements. In a particular embodiment, the plurality of leads can extend from chip contacts of the first microelectronic element to the edge contacts. In one embodiment, the plurality of leads can extend from chip contacts of the second microelectronic element to the edge contacts.

"In a particular embodiment, the module can also include a plurality of third microelectronic elements. Each third microelectronic element can be electrically connected to the module card. In an exemplary embodiment, the plurality of third microelectronic elements can be arranged in a stacked configuration. Each of the third microelectronic elements can have a front or rear surface confronting a front or rear surface of an adjacent one of the third microelectronic elements. In one embodiment, the plurality of third microelectronic elements can be arranged in a planar configuration. Each of the third microelectronic elements can have a peripheral surface confronting a peripheral surface of an adjacent one of the third microelectronic elements. In a particular embodiment, the second microelectronic element can include volatile RAM, the third microelectronic elements can each include nonvolatile flash memory, and the first microelectronic element can include a processor configured to predominantly control transfers of data between an external component and the second and third microelectronic elements. In an exemplary embodiment, the second microelectronic element can include a volatile frame buffer memory storage element, the third microelectronic elements can each include nonvolatile flash memory, and the first microelectronic element can include a graphics processor.

"In accordance with another aspect of the invention, a module can include a module card, first and second microelectronic elements, and a plurality of leads. The module card can have a first surface, a second surface, and a plurality of parallel exposed edge contacts adjacent an edge of at least one of the first and second surfaces for mating with corresponding contacts of a socket when the module is inserted in the socket. The first microelectronic element can have a rear surface facing the first surface of the module card. The second microelectronic element can have a front surface facing the first surface of the module card. Each microelectronic element can be electrically connected to the module card. The second microelectronic element can partially overlie a front surface of the first microelectronic element and can be attached thereto. The plurality of leads can extend from chip contacts of the second microelectronic element to the edge contacts.

"In a particular embodiment, the module card can further include an aperture extending between the first and second surfaces. The plurality of leads can extend within the aperture. In one embodiment, the second microelectronic element can be flip-chip bonded to the module card. In an exemplary embodiment, a component can include first and second modules as described above bonded to one another. The second surfaces of the module cards can face one another.

"In accordance with yet another aspect of the invention, a module can include a lead frame, first and second microelectronic elements having front surfaces facing a first surface of the lead frame, and an encapsulant covering the first and second microelectronic elements and a portion of the lead frame. The lead frame can also have a second surface and a plurality of exposed module contacts adjacent an edge of at least one of the first and second surfaces for mating with corresponding contacts of a socket when the module is inserted in the socket. Each microelectronic element can be electrically connected to the lead frame. The front surface of the second microelectronic element can partially overlie a rear surface of the first microelectronic element and can be attached thereto.

"In one embodiment, a component can include first and second modules as described above bonded to one another. The second surfaces of the lead frames can face one another. In an exemplary embodiment, a system can include a plurality of modules as described above, a circuit panel, and a processor. The exposed contacts of the modules can be inserted into a mating socket electrically connected with the circuit panel. Each module can be configured to transfer a number N of data bits in parallel in a clock cycle. The processor can be configured to transfer a number M of data bits in parallel in a clock cycle. M can be greater than or equal to N.

"Further aspects of the invention can provide systems that incorporate modules and/or components according to the foregoing aspects of the invention, composite chips according to the foregoing aspects of the invention, or both in conjunction with other electronic components electrically connected thereto. For example, the system can be disposed in and/or mounted to a single housing, which can be a portable housing. Systems according to preferred embodiments in this aspect of the invention can be more compact than comparable conventional systems.

"In accordance with still another aspect of the invention, a method of fabricating a module can include providing a module card, mounting first and second microelectronic elements onto the module card, and electrically connecting the first and second microelectronic elements to the module card. The module card can have a first surface, a second surface, and a plurality of exposed edge contacts adjacent an edge of at least one of the first and second surfaces for mating with corresponding contacts of a socket when the module is inserted in the socket. Front surfaces of the first and second microelectronic elements can face the first surface of the module card. The front surface of the second microelectronic element can partially overlie a rear surface of the first microelectronic element and can be attached thereto.

"In an exemplary embodiment, the module card can further include an aperture extending between the first and second surfaces. The module can also include a plurality of leads extending within the aperture from chip contacts of at least one of the first and second microelectronic elements to the edge contacts. In a particular embodiment, the leads can include conductive elements on the module card. The step of electrically connecting the first and second microelectronic elements to the module card can electrically connect the conductive elements to the chip contacts of at least one of the first and second microelectronic elements using a bonding tool inserted through the aperture.

"In one embodiment, the leads can include wire bonds extending from the conductive elements to the chip contacts. In an exemplary embodiment, the leads can include lead bonds extending from the conductive elements to the chip contacts. In a particular embodiment, the method can also include the step of injecting an encapsulant onto the rear surfaces of the microelectronic elements and the first surface of the module card. In one embodiment, the encapsulant can be a first encapsulant. The method can also include the step of injecting a second encapsulant into the aperture such that portions of the leads between the chip contacts and the module card are covered by the second encapsulant.

"In a particular embodiment, the step of mounting first and second microelectronic elements onto the module card can include applying a compliant die attachment adhesive between the first surface of the module card and the front surface of the first microelectronic element. In an exemplary embodiment, the method can also include the step of mounting a spacer between the front surface of the second microelectronic element and the first surface of the module card. The spacer can have substantially the same thickness in a vertical direction substantially perpendicular to the first surface as the first microelectronic element.

BRIEF DESCRIPTION OF THE DRAWINGS

"FIG. 1A is a diagrammatic sectional view of a stacked microelectronic assembly according to an embodiment of the present invention.

"FIG. 1B is a bottom sectional view of the stacked assembly of FIG. 1A, taken along the line 1B-1B of FIG. 1A.

"FIG. 1C is a side sectional view of the stacked assembly of FIG. 1B, taken along the line 1C-1C of FIG. 1B.

"FIG. 2 is a diagrammatic sectional view of a stacked microelectronic assembly according to another embodiment having a flip-chip bonded microelectronic element.

"FIG. 3 is a diagrammatic sectional view of a stacked microelectronic assembly according to another embodiment having a face-up microelectronic element.

"FIG. 4 is a diagrammatic sectional view of a stacked microelectronic assembly according to another embodiment having a single window in the module card through which wire bonds attached to two microelectronic elements extend.

"FIG. 5 is a diagrammatic sectional view of a stacked microelectronic assembly according to another embodiment having lead bonds.

"FIG. 6 is a diagrammatic sectional view of a stacked microelectronic assembly according to another embodiment having elongated solder connects.

"FIG. 7 is a diagrammatic sectional view of a stacked microelectronic assembly according to another embodiment having a microelectronic element with contacts located near an edge thereof.

"FIG. 8 is a variation of the bottom sectional view of the stacked assembly of FIG. 1B, in which one microelectronic elements has rows of central contacts oriented substantially perpendicular to rows of central contacts of another microelectronic element.

"FIG. 9A is a diagrammatic sectional view of a stacked microelectronic assembly according to another embodiment having a lead frame.

"FIG. 9B is a bottom sectional view of the stacked assembly of FIG. 9A, taken along the line 9B-9B of FIG. 9A.

"FIG. 9C is a side sectional view of the stacked assembly of FIG. 9B, taken along the line 9C-9C of FIG. 9B.

"FIG. 10A is a diagrammatic top view of a stacked microelectronic assembly according to another embodiment having a plurality of stacked microelectronic elements, shown without an encapsulant.

"FIG. 10B is a side sectional view of the stacked assembly of FIG. 10A, taken along the line 10B-10B of FIG. 10A.

"FIG. 10C is a diagrammatic top view of a stacked microelectronic assembly according to another embodiment having a plurality of microelectronic elements adjacent to one another.

"FIG. 11 is a diagrammatic perspective view of a stacked microelectronic assembly according to another embodiment including two module cards bonded to one another.

"FIG. 12 is a schematic depiction of a system according to one embodiment including a plurality of modules.

"FIG. 13 is a top plan view of a microelectronic element in the embodiment of FIG. 1A.

"FIG. 14 is a top plan view of another microelectronic element in the embodiment of FIG. 1A."

For additional information on this patent application, see: Zohni, Wael; Haba, Belgacem. Stacked Chip-On-Board Module with Edge Connector. Filed January 16, 2014 and posted May 22, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=5455&p=110&f=G&l=50&d=PG01&S1=20140515.PD.&OS=PD/20140515&RS=PD/20140515

Keywords for this news article include: Tessera Inc, Microelectronics.

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Source: Electronics Newsweekly


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