The assignee for this patent, patent number 8732526, is
Reporters obtained the following quote from the background information supplied by the inventors: "A. Technical Field
"The present invention relates generally to integrated circuits, and more particularly to methods, systems and devices of employing a single-wire data interface to program, debug and test a programmable element. Commands and associated data are time-multiplexed to a serial signal according to a data sequence protocol, and communicated between a programming entity and the programmable element via the single-wire data interface, efficiently reducing the pin count at an interface of the programmable element.
"B. Background of the Invention
"Integrated circuits incorporate millions of transistors on small chips to implement complicated functions, and are used in almost all electronic equipment and appliances today. For instance, a microprocessor is a single integrated circuit that incorporates computational functions of a central processing unit (CPU) in a computer. A microcontroller is another exemplary integrated circuit functioning as a main processing core that may be used to control an embedded system that performs one or several specialized functions. Microprocessors and microcontrollers account for almost all processors encountered in daily life, and have spanned all aspects of modern life, e.g., desktop computers, laptop computers, cellular phones, music players, global positioning system (GPS), washing machines, remote controls, motor controllers and medical imaging systems.
"Many integrated circuits are programmable, and need an interface over which program codes are loaded, debugged, and tested. Sometimes, this interface may be applied to verify the integrated circuits as well. The program codes are stored in simple flip-flops or more complex memories, such as a non-volatile flash memory, in the integrated circuits. The interface needs to be compatible with the integrated circuits such that the program codes may be successfully loaded, and subsequently debugged and tested over it.
"FIG. 1 illustrates an exemplary block diagram 100 of a JTAG system for programming, debugging and testing a programmable integrated circuit (IC) 102. The JTAG system 100 comprises the programmable IC 102, a programming entity 104, and a JTAG emulation probe 106. The programmable IC 102 further comprises a JTAG test access port 108, an execution unit (e.g., a CPU core) 110, an internal memory 112, and a read-only memory (ROM) 114 that is attached to the execution unit 110.
"The programming entity 104 is a generic personal computer (PC) or a dedicated programmer hardware that generates program codes for the programmable IC 102. The JTAG emulation probe 106 is coupled to the programming entity 104. The programmable IC 102 may be a microprocessor, a microcontroller, a state machine, or a field-programmable gate array (FPGA). In this programmable IC 102, the execution unit 110 is coupled to the JTAG test access port 108, and the internal memory 112 is coupled to the execution unit 110. Program codes are provided by the programming entity 104, and ultimately loaded into the internal memory 112 included in the programmable IC 102.
"The programming IC 102 is directly coupled to the JTAG emulation probe 106, and thus indirectly to the programming entity 104, via a five-wire JTAG data interface. The five-wire JTAG data interface is associated with five pins (TDI, TDO, TCK, TMS and RESET) on the programmable IC 102 for five respective signals of test data in, test data out, test clock, test mode select and system reset. System reset (RESET) is mainly used for state control during program loading and debugging. As the programmable IC 102 scales down in size, these four pins in the JTAG data interface may not be spared without compromising programmability of this system. The JTAG data interface takes up valuable input/output (I/O) resources, such as chip area for I/O circuit, in addition to the pins at the interface of the programmable IC 102."
In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventors' summary information for this patent: "Various embodiments of the present invention relate to integrated circuits, and more particularly to methods, systems and devices of employing a single-wire data interface to program, debug and test a programmable element. Commands and associated data are time-multiplexed to a serial signal according to a data sequence protocol, and communicated between a programming entity and the programmable element via the single-wire data interface, efficiently reducing the pin count at an interface of the programmable element.
"A 1-WireLoader system comprises the programming entity, a physical-layer interface device, a single signal wire, and the programmable element. The programming entity generates a command sequence comprising a plurality of commands. Each command in the plurality of commands is associated with a data in a plurality of data. The physical-layer interface device is coupled directly to the programming entity, and indirectly to the programmable element via a single signal wire. A single pin is involved at the interface of the programmable element to receive commands from and exchange data with the programming entity. In some embodiments of the 1-WireLoader system, this single pin is multiplexed with a reset I/O pin while not interfering with normal operation of the system reset signal.
"A method of loading, debugging or testing program codes for a programmable element via a single-wire data interface includes three steps of identification, selection and communication. Commands and associated data involved in these steps are communicated according to a data sequence protocol between a programming entity and a programmable element. In the identification step, the programming entity interrogates the programmable element to determine the presence of the latter. In the selection step, the programmable element is selected by a device selection command, and configured to respond to a subsequent command sequence generated by the programming entity. In the communication step, the command sequence is communicated via a single-wire data interface according to the data sequence protocol, and thereafter, implemented sequentially in the programmable element. The command sequence comprises a plurality of commands each of which is associated with a data in a plurality of data. The plurality of data may include program codes to load, or data associated with program loading, debugging or testing.
"Certain features and advantages of the present invention have been generally described in this summary section; however, additional features, advantages, and embodiments are presented herein or will be apparent to one of ordinary skill in the art in view of the drawings, specification, and claims. Accordingly, it should be understood that the scope of the invention shall not be limited by the particular embodiments disclosed in this summary section."
For more information, see this patent: Marroquin, Jesse; Metzinger,
Keywords for this news article include: Electronics, Microcontroller, Microprocessors,
Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2014, NewsRx LLC
Most Popular Stories
- National Retail Federation Reduces Sales Forecast
- Amazon Hiring on Calif.'s Central Coast
- Sporty Ford Fiesta Fires on All 3 Cylinders
- Prison Workers Wanted
- Pandora Tumbles in Late Trading
- Jennifer Lopez Throws Big Bash for Birthday
- Small Firms Take Out the Trash in Jersey
- Citigroup Unit Paying $5 Million to Settle SEC Charges
- Execs Help Entrepreneurs, Get Chevy Volts
- Obama Seeks Help From Central American Leaders