This patent application is assigned to
The following quote was obtained by the news editors from the background information supplied by the inventors: "This invention is related to the field of processor implementation, and more particularly to the implementation and testing of register files.
"Computing systems may include one or more systems on a chip (SoC), which may integrate a number of different functions, such as, graphics processing, and memories onto a single integrated circuit. With numerous functions included in a single integrated circuit, chip count may be kept low in mobile computing systems, such as tablets, for example, which may result in a smaller form factor for such mobile computing systems.
"SoCs typically include a number of data storage blocks of various storage capacities. Typically, large data storage blocks may be implemented as static random access memories (SRAMs) or dynamic random access memories (DRAMs). In some cases, smaller data storage blocks may be implemented as register files, whose data storage cells may be implemented according to one of various design styles.
"During the semiconductor manufacturing process, variations in lithography, transistor dopant levels, etc., may result in different electrical characteristics between data storage cells that are intended to have identical characteristics. Additional variation in electrical characteristics may occur due to aging effects within the transistors as the device is repeatedly operated. These differences in electrical characteristics between transistors can result in data storage cells, such as those used in implementing register files, requiring different amounts to time to store data into the cells.
"In some cases, the variation within data storage cells, as well as changes in power supply voltage, may result in a processor or SoC not being able to store data into a data storage cell within a pre-determined clock cycle period. Such data storage cells may be identified as failures during testing and may require re-design in order to achieve manufacturing yield goals."
In addition to the background information obtained for this patent application, VerticalNews journalists also obtained the inventors' summary information for this patent application: "Various embodiments of circuit for testing a register file on an integrated circuit are disclosed. Broadly speaking, a circuit and a method are contemplated in which, at various power supply voltages, data may be read from a selected register cell within a register file. The read data may be inverted and stored back into the selected register cell. The stored inverted data may then be re-read from the selected register cell. The activation of a read port of the selected register cell may be dependent upon the inverted read data.
"In one embodiment, the circuit for testing may include a frequency divider. The frequency divider may be configured to generate a test output dependent upon the read data. The frequency of the test output may be less than the frequency of the read data.
"In a further embodiment, a read-write oscillation frequency may be measured through the selected register cell. A read oscillation frequency may also be measure through the selected register cell. A write oscillation frequency may be calculated dependent upon the measure read-write and read oscillation frequencies.
BRIEF DESCRIPTION OF THE DRAWINGS
"The following detailed description makes reference to the accompanying drawings, which are now briefly described.
"FIG. 1 illustrates an embodiment of a system on a chip.
"FIG. 2 illustrates an embodiment of a register file.
"FIG. 3 illustrates an embodiment of a register.
"FIG. 4 illustrates an embodiment of a register cell.
"FIG. 5 illustrates an alternative embodiment of a register cell.
"FIG. 6 illustrates an embodiment of a register file test circuit.
"FIG. 7 illustrates a flowchart of an example method of testing a register file.
"FIG. 8 illustrates a flowchart of an example method for determining the write frequency of a register file.
"While the disclosure is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the drawings and detailed description thereto are not intended to limit the disclosure to the particular form illustrated, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the present disclosure as defined by the appended claims. The headings used herein are for organizational purposes only and are not meant to be used to limit the scope of the description. As used throughout this application, the word 'may' is used in a permissive sense (i.e., meaning having the potential to), rather than the mandatory sense (i.e., meaning must). Similarly, the words 'include,' 'including,' and 'includes' mean including, but not limited to.
"Various units, circuits, or other components may be described as 'configured to' perform a task or tasks. In such contexts, 'configured to' is a broad recitation of structure generally meaning 'having circuitry that' performs the task or tasks during operation. As such, the unit/circuit/component can be configured to perform the task even when the unit/circuit/component is not currently on. In general, the circuitry that forms the structure corresponding to 'configured to' may include hardware circuits. Similarly, various units/circuits/components may be described as performing a task or tasks, for convenience in the description. Such descriptions should be interpreted as including the phrase 'configured to.' Reciting a unit/circuit/component that is configured to perform one or more tasks is expressly intended not to invoke 35 U.S.C. .sctn.112, paragraph six interpretation for that unit/circuit/component. More generally, the recitation of any element is expressly intended not to invoke 35 U.S.C. .sctn.112, paragraph six interpretation for that element unless the language 'means for' or 'step for' is specifically recited."
URL and more information on this patent application, see: Hess, Greg M.; Burnette, II, James E. Register File Write Ring Oscillator. Filed
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